Lines Matching refs:aCPUs

167         if (pGip->aCPUs[i].idCpu == idCpu)
216 if (RT_LIKELY(iCpu < pGip->cCpus && pGip->aCPUs[iCpu].idCpu == idCpu))
217 supdrvGipReInitCpu(pGip, &pGip->aCPUs[iCpu], *(uint64_t *)pvUser2);
485 if (pGipR0->aCPUs[0].u32TransactionId != 2 /* not the first time */)
489 ASMAtomicUoWriteU32(&pGipR0->aCPUs[i].u32TransactionId,
490 (pGipR0->aCPUs[i].u32TransactionId + GIP_UPDATEHZ_RECALC_FREQ * 2)
502 supdrvGipReInitCpu(pGipR0, &pGipR0->aCPUs[0], u64NanoTS);
725 ASMAtomicWriteU64(&pGip->aCPUs[0].u64CpuHz, uCpuHz);
729 ASMAtomicWriteU64(&pGip->aCPUs[iTick + 1].u64CpuHz, uCpuHz);
805 int64_t iStartTscDelta = iStartGipCpu < pGip->cCpus ? pGip->aCPUs[iStartGipCpu].i64TSCDelta : INT64_MAX;
806 int64_t iStopTscDelta = iStopGipCpu < pGip->cCpus ? pGip->aCPUs[iStopGipCpu].i64TSCDelta : INT64_MAX;
1132 int64_t iStartTscDelta = iStartGipCpu < pGip->cCpus ? pGip->aCPUs[iStartGipCpu].i64TSCDelta : INT64_MAX;
1133 int64_t iStopTscDelta = iStopGipCpu < pGip->cCpus ? pGip->aCPUs[iStopGipCpu].i64TSCDelta : INT64_MAX;
1218 if (pGip->aCPUs[i].idCpu == idCpu)
1227 ASMAtomicCmpXchgSize(&pGip->aCPUs[i].idCpu, idCpu, NIL_RTCPUID, fRc);
1283 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, pGip->u64CpuHz);
1286 ASMAtomicWriteU16(&pGip->aCPUs[i].idApic, idApic);
1287 ASMAtomicWriteS16(&pGip->aCPUs[i].iCpuSet, (int16_t)iCpuSet);
1288 ASMAtomicWriteSize(&pGip->aCPUs[i].idCpu, idCpu);
1303 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_ONLINE);
1346 AssertReturnVoid(pGip->aCPUs[i].idCpu == idCpu);
1357 ASMAtomicWriteS64(&pGip->aCPUs[i].i64TSCDelta, INT64_MAX);
1363 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_OFFLINE);
1717 size_t const cbGip = RT_ALIGN_Z(RT_OFFSETOF(SUPGLOBALINFOPAGE, aCPUs[cCpus]), PAGE_SIZE);
1756 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS, 0 /*uCpuHz*/);
1814 rc = RTR0MemObjAllocCont(&pDevExt->GipMemObj, RT_UOFFSETOF(SUPGLOBALINFOPAGE, aCPUs[cCpus]), false /*fExecutable*/);
1914 Log(("supdrvTscDeltaInit: cpu[%u] delta %lld\n", iCpu, pGip->aCPUs[iCpu].i64TSCDelta));
1919 AssertMsg(!pGip->aCPUs[iCpu].i64TSCDelta, ("iCpu=%u %lld mode=%d\n", iCpu, pGip->aCPUs[iCpu].i64TSCDelta, pGip->u32Mode));
1986 pGip->aCPUs[i].u64NanoTS = 0;
1987 pGip->aCPUs[i].u64TSC = 0;
1988 pGip->aCPUs[i].iTSCHistoryHead = 0;
1989 pGip->aCPUs[i].u64TSCSample = 0;
1990 pGip->aCPUs[i].i64TSCDelta = INT64_MAX;
2259 pGipCpu = &pGip->aCPUs[0];
2265 pGipCpu = &pGip->aCPUs[iCpu];
2345 if (pGip->aCPUs[iCpu].enmState == SUPGIPCPUSTATE_OFFLINE)
2352 PSUPGIPCPU pGipCpu = &pGip->aCPUs[iCpu];
2417 int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
3726 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[idxWorker];
3769 pGipCpuMaster = &pGip->aCPUs[iGipCpuMaster];
3782 && pGip->aCPUs[i].enmState == SUPGIPCPUSTATE_ONLINE
3783 && pGip->aCPUs[i].i64TSCDelta != INT64_MAX
3784 && pGip->aCPUs[i].idCpu != NIL_RTCPUID
3785 && pGip->aCPUs[i].idCpu != idMaster /* paranoia starts here... */
3786 && pGip->aCPUs[i].idCpu != pGipCpuWorker->idCpu
3787 && pGip->aCPUs[i].idApic != pGipCpuWorker->idApic
3788 && pGip->aCPUs[i].idApic != pGipCpuMaster->idApic
3789 && RTMpIsCpuOnline(pGip->aCPUs[i].idCpu))
3792 pGipCpuMaster = &pGip->aCPUs[i];
3894 PSUPGIPCPU pGipCpu = &pGip->aCPUs[iCpu];
3931 PSUPGIPCPU pGipCpu = &pGip->aCPUs[idxCpu];
3978 pGipCpuMaster = &pGip->aCPUs[idxMaster];
3999 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[iCpu];
4148 PSUPGIPCPU pGipCpuWorker = &pGip->aCPUs[iCpu];
4477 if ( pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX
4546 && pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX)
4556 Assert(pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX || RT_FAILURE_NP(rc));
4664 int64_t i64Delta = pGip->aCPUs[iGipCpu].i64TSCDelta;
4665 pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic;
4690 Assert(pGip->aCPUs[iGipCpu].i64TSCDelta != INT64_MAX || RT_FAILURE_NP(rc));
4715 pReq->u.Out.idApic = pGip->aCPUs[iGipCpu].idApic;