Lines Matching refs:Dis
42 DISSTATE Dis;
95 size_t cch = DISFormatYasmEx(&pState->Dis, szTmp, sizeof(szTmp),
173 RTUINTPTR uSrcAddr = pState->Dis.uInstrAddr + offInstr;
182 memcpy(&pState->Dis.abInstr[offInstr], pState->pbNext, cbToRead);
183 pState->Dis.cbCachedInstr = offInstr + cbToRead;
197 memcpy(&pState->Dis.abInstr[offInstr], pState->pbNext, pState->cbLeft);
204 memset(&pState->Dis.abInstr[offInstr], 0xcc, cbMinRead);
213 memset(&pState->Dis.abInstr[offInstr], 0x90, cbMinRead);
216 pState->Dis.cbCachedInstr = offInstr + cbMinRead;
288 &State.Dis, &State.cbInstr, State.szLine, sizeof(State.szLine));
296 || State.Dis.pCurInstr->uOpcode == OP_INVALID
297 || State.Dis.pCurInstr->uOpcode == OP_ILLUD2
299 && !MyDisasIsValidInstruction(&State.Dis));
304 State.Dis.abInstr[0] = 0;
305 State.Dis.pfnReadBytes(&State.Dis, 0, 1, 1);
310 RTPrintf(off ? ", %03xh" : " %03xh", State.Dis.abInstr[off]);
315 RTPrintf("%s: error at %#RX64: unexpected valid instruction (op=%d)\n", argv0, State.uAddress, State.Dis.pCurInstr->uOpcode);
321 RTPrintf("%s: error at %#RX64: undefined opcode (op=%d)\n", argv0, State.uAddress, State.Dis.pCurInstr->uOpcode);
329 && DISFormatYasmIsOddEncoding(&State.Dis))
333 RTPrintf(off ? ", %03xh" : " %03xh", State.Dis.abInstr[off]);
364 uint8_t abInstr[sizeof(State.Dis.abInstr)];
365 memcpy(abInstr, State.Dis.abInstr, sizeof(State.Dis.abInstr));
367 abInstr, State.Dis.cbCachedInstr, MyDisasInstrRead, &State,
368 &State.Dis, &cbInstrOnly);