Cross Reference: /vbox/src/VBox/Devices/Storage/DevAHCI.cpp

Lines Matching refs:iPort
365     uint8_t             iPort;
1003 static int ahciHbaSetInterrupt(PAHCI pAhci, uint8_t iPort, int rcBusy)
1005     Log(("P%u: %s: Setting interrupt\n", iPort, __FUNCTION__));
1013         if ((pAhci->regHbaCccCtl & AHCI_HBA_CCC_CTL_EN) && (pAhci->regHbaCccPorts & (1 << iPort)))
1025                     Log(("P%u: %s: Fire interrupt\n", iPort, __FUNCTION__));
1037             ASMAtomicOrU32((volatile uint32_t *)&pAhci->u32PortsInterrupted, (1 << iPort));
1038             if (!(pAhci->u32PortsInterrupted & ~(1 << iPort)))
1040                 Log(("P%u: %s: Fire interrupt\n", iPort, __FUNCTION__));
1135         pItem->iPort = pAhciPort->iLUN;
1402                     pItem->iPort = pAhciPort->iLUN;
2203         uint32_t iPort;
2207         iPort = uReg / AHCI_PORT_REGISTER_SIZE;
2211         Log3(("%s: Trying to read from port %u and register %u\n", __FUNCTION__, iPort, iReg));
2213         if (RT_LIKELY(   iPort < pAhci->cPortsImpl
2217             rc = pPortReg->pfnRead(pAhci, &pAhci->ahciPort[iPort], iReg, (uint32_t *)pv);
2221             Log3(("%s: Trying to read port %u register %u/%u!!!\n", __FUNCTION__, iPort, iReg, RT_ELEMENTS(g_aPortOpRegs)));
2247                     AssertMsgFailed(("%s: unsupported access width cb=%d iPort=%x iRegOffset=%x iReg=%x!!!\n",
2248                                      __FUNCTION__, cb, iPort, iRegOffset, iReg));
2291         uint32_t iPort;
2295         iPort   =  offReg / AHCI_PORT_REGISTER_SIZE;
2297         Log3(("%s: Trying to write to port %u and register %u\n", __FUNCTION__, iPort, iReg));
2298         if (RT_LIKELY(   iPort < pAhci->cPortsImpl
2302             rc = pPortReg->pfnWrite(pAhci, &pAhci->ahciPort[iPort], iReg, u32Value);
2306             Log3(("%s: Trying to write port %u register %u/%u!!!\n", __FUNCTION__, iPort, iReg, RT_ELEMENTS(g_aPortOpRegs)));
6590     PAHCIPort                 pAhciPort = &pThis->ahciPort[pNotifierItem->iPort];
7043         uint32_t iPort;
7044         int rc = CFGMR3QueryU32Def(pDevIns->pCfg, s_apszIdeEmuPortNames[i], &iPort, i);
7046         SSMR3PutU32(pSSM, iPort);
7285             uint32_t iPort;
7286             rc = CFGMR3QueryU32Def(pDevIns->pCfg, s_apszIdeEmuPortNames[i], &iPort, i);
7293             if (iPortSaved != iPort)
7295                                         s_apszIdeEmuPortNames[i], iPortSaved, iPort);
7649     for (unsigned iPort = 0; iPort < pThis->cPortsImpl; iPort++)
7650         ahciR3PortCachedReqsFree(&pThis->ahciPort[iPort]);
7670         for (unsigned iPort = 0; iPort < pThis->cPortsImpl; iPort++)
7671             ahciR3PortCachedReqsFree(&pThis->ahciPort[iPort]);
7716             pItem->iPort = pAhci->ahciPort[i].iLUN;