Lines Matching defs:u32Value
921 int (*pfnWrite)(PAHCI ahci, uint32_t iReg, uint32_t u32Value);
931 int (*pfnWrite)(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value);
1145 static int PortCmdIssue_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1149 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1156 && u32Value > 0)
1162 u32Value &= ~pAhciPort->regCI;
1164 ASMAtomicOrU32(&pAhciPort->u32TasksNew, u32Value);
1171 pAhciPort->regCI |= u32Value;
1191 static int PortSActive_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1193 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1195 pAhciPort->regSACT |= u32Value;
1214 static int PortSError_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1216 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1218 if ( (u32Value & AHCI_PORT_SERR_X)
1226 if ( (u32Value & AHCI_PORT_SERR_N)
1230 pAhciPort->regSERR &= ~u32Value;
1242 static int PortSControl_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1244 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1246 AHCI_PORT_SCTL_IPM_GET(u32Value), AHCI_PORT_SCTL_SPD_GET(u32Value), AHCI_PORT_SCTL_DET_GET(u32Value)));
1251 if ((u32Value & AHCI_PORT_SCTL_DET) == AHCI_PORT_SCTL_DET_INIT)
1261 pAhciPort->regSCTL = u32Value;
1263 else if ( (u32Value & AHCI_PORT_SCTL_DET) == AHCI_PORT_SCTL_DET_NINIT
1271 pAhciPort->regSCTL = u32Value; /* Update after finishing the reset, so the I/O thread doesn't get a chance to do the reset. */
1276 pAhciPort->regSCTL = u32Value; /* Update before kicking the I/O thread. */
1283 pAhciPort->regSCTL = u32Value;
1353 static int PortCmd_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1355 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1357 __FUNCTION__, (u32Value & AHCI_PORT_CMD_ICC) >> 28, (u32Value & AHCI_PORT_CMD_ASP) >> 27,
1358 (u32Value & AHCI_PORT_CMD_ALPE) >> 26, (u32Value & AHCI_PORT_CMD_DLAE) >> 25,
1359 (u32Value & AHCI_PORT_CMD_ATAPI) >> 24, (u32Value & AHCI_PORT_CMD_CPD) >> 20,
1360 (u32Value & AHCI_PORT_CMD_ISP) >> 19, (u32Value & AHCI_PORT_CMD_HPCP) >> 18,
1361 (u32Value & AHCI_PORT_CMD_PMA) >> 17, (u32Value & AHCI_PORT_CMD_CPS) >> 16,
1362 (u32Value & AHCI_PORT_CMD_CR) >> 15, (u32Value & AHCI_PORT_CMD_FR) >> 14,
1363 (u32Value & AHCI_PORT_CMD_ISS) >> 13, (u32Value & AHCI_PORT_CMD_CCS) >> 8,
1364 (u32Value & AHCI_PORT_CMD_FRE) >> 4, (u32Value & AHCI_PORT_CMD_CLO) >> 3,
1365 (u32Value & AHCI_PORT_CMD_POD) >> 2, (u32Value & AHCI_PORT_CMD_SUD) >> 1,
1366 (u32Value & AHCI_PORT_CMD_ST)));
1369 u32Value &= ~AHCI_PORT_CMD_CCS;
1373 if (u32Value & AHCI_PORT_CMD_CLO)
1376 u32Value &= ~(AHCI_PORT_TFD_BSY | AHCI_PORT_TFD_DRQ);
1378 u32Value &= ~(AHCI_PORT_CMD_CLO);
1381 if (u32Value & AHCI_PORT_CMD_ST)
1391 u32Value |= AHCI_PORT_CMD_CR;
1412 u32Value &= ~AHCI_PORT_CMD_CR;
1422 u32Value &= ~AHCI_PORT_CMD_CR;
1427 if ((u32Value & AHCI_PORT_CMD_POD) && (pAhciPort->regCMD & AHCI_PORT_CMD_CPS) && !pAhciPort->fPoweredOn)
1460 if ((u32Value & AHCI_PORT_CMD_SUD) && pAhciPort->fPoweredOn && !pAhciPort->fSpunUp)
1467 if (u32Value & AHCI_PORT_CMD_FRE)
1471 u32Value |= AHCI_PORT_CMD_FR;
1485 else if (!(u32Value & AHCI_PORT_CMD_FRE))
1488 u32Value &= ~AHCI_PORT_CMD_FR;
1491 pAhciPort->regCMD = u32Value;
1519 static int PortIntrEnable_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1522 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1524 __FUNCTION__, (u32Value & AHCI_PORT_IE_CPDE) >> 31, (u32Value & AHCI_PORT_IE_TFEE) >> 30,
1525 (u32Value & AHCI_PORT_IE_HBFE) >> 29, (u32Value & AHCI_PORT_IE_HBDE) >> 28,
1526 (u32Value & AHCI_PORT_IE_IFE) >> 27, (u32Value & AHCI_PORT_IE_INFE) >> 26,
1527 (u32Value & AHCI_PORT_IE_OFE) >> 24, (u32Value & AHCI_PORT_IE_IPME) >> 23,
1528 (u32Value & AHCI_PORT_IE_PRCE) >> 22, (u32Value & AHCI_PORT_IE_DIE) >> 7,
1529 (u32Value & AHCI_PORT_IE_PCE) >> 6, (u32Value & AHCI_PORT_IE_DPE) >> 5,
1530 (u32Value & AHCI_PORT_IE_UFE) >> 4, (u32Value & AHCI_PORT_IE_SDBE) >> 3,
1531 (u32Value & AHCI_PORT_IE_DSE) >> 2, (u32Value & AHCI_PORT_IE_PSE) >> 1,
1532 (u32Value & AHCI_PORT_IE_DHRE)));
1534 u32Value &= AHCI_PORT_IE_READONLY;
1539 if (u32Value & u32IntrStatus)
1543 pAhciPort->regIE = u32Value;
1571 static int PortIntrSts_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1573 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1574 ASMAtomicAndU32(&pAhciPort->regIS, ~(u32Value & AHCI_PORT_IS_READONLY));
1592 static int PortFisAddrUp_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1594 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1596 pAhciPort->regFBU = u32Value;
1615 static int PortFisAddr_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1617 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1619 Assert(!(u32Value & ~AHCI_PORT_FB_RESERVED));
1621 pAhciPort->regFB = (u32Value & AHCI_PORT_FB_RESERVED);
1630 static int PortCmdLstAddrUp_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1632 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1634 pAhciPort->regCLBU = u32Value;
1663 static int PortCmdLstAddr_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1665 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1667 Assert(!(u32Value & ~AHCI_PORT_CLB_RESERVED));
1669 pAhciPort->regCLB = (u32Value & AHCI_PORT_CLB_RESERVED);
1698 static int HbaInterruptStatus_w(PAHCI ahci, uint32_t iReg, uint32_t u32Value)
1701 Log(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1707 ahci->regHbaIs &= ~(u32Value);
1720 while ((u32Value > 0) && (i < AHCI_MAX_NR_PORTS_IMPL))
1722 if (u32Value & 0x01)
1734 u32Value >>= 1;
1797 static int HbaControl_w(PAHCI ahci, uint32_t iReg, uint32_t u32Value)
1799 Log(("%s: write u32Value=%#010x\n"
1801 __FUNCTION__, u32Value,
1802 __FUNCTION__, (u32Value & AHCI_HBA_CTRL_AE) >> 31, (u32Value & AHCI_HBA_CTRL_IE) >> 1,
1803 (u32Value & AHCI_HBA_CTRL_HR)));
1813 ASMAtomicWriteU32(&ahci->regHbaCtrl, (u32Value & AHCI_HBA_CTRL_RW_MASK) | AHCI_HBA_CTRL_AE);
1820 if ( (u32Value & AHCI_HBA_CTRL_HR)
1865 static int HbaCccCtl_w(PAHCI ahci, uint32_t iReg, uint32_t u32Value)
1867 Log(("%s: write u32Value=%#010x\n"
1869 __FUNCTION__, u32Value,
1870 __FUNCTION__, AHCI_HBA_CCC_CTL_TV_GET(u32Value), AHCI_HBA_CCC_CTL_CC_GET(u32Value),
1871 AHCI_HBA_CCC_CTL_INT_GET(u32Value), (u32Value & AHCI_HBA_CCC_CTL_EN)));
1873 ahci->regHbaCccCtl = u32Value;
1874 ahci->uCccTimeout = AHCI_HBA_CCC_CTL_TV_GET(u32Value);
1875 ahci->uCccPortNr = AHCI_HBA_CCC_CTL_INT_GET(u32Value);
1876 ahci->uCccNr = AHCI_HBA_CCC_CTL_CC_GET(u32Value);
1878 if (u32Value & AHCI_HBA_CCC_CTL_EN)
1908 static int HbaCccPorts_w(PAHCI ahci, uint32_t iReg, uint32_t u32Value)
1910 Log(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
1912 ahci->regHbaCccPorts = u32Value;
1942 static int HbaInvalid_w(PAHCI ahci, uint32_t iReg, uint32_t u32Value)
1944 Log(("%s: Write denied!!! iReg=%u u32Value=%#010x\n", __FUNCTION__, iReg, u32Value));
1951 static int PortInvalid_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
1953 ahciLog(("%s: Write denied!!! iReg=%u u32Value=%#010x\n", __FUNCTION__, iReg, u32Value));
2263 * @param u32Value The value to write.
2265 static int ahciRegisterWrite(PAHCI pAhci, uint32_t offReg, uint32_t u32Value)
2281 rc = pReg->pfnWrite(pAhci, iReg, u32Value);
2302 rc = pPortReg->pfnWrite(pAhci, &pAhci->ahciPort[iPort], iReg, u32Value);