Lines Matching refs:IOPortBase
140 RTIOPORT IOPortBase;
743 SSMR3PutIOPort(pSSM, pThis->IOPortBase);
809 RTIOPORT IOPortBase;
810 rc = SSMR3GetIOPort(pSSM, &IOPortBase); AssertRCReturn(rc, rc);
811 if (IOPortBase != pThis->IOPortBase)
812 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - IOPortBase: saved=%RTiop config=%RTiop"), IOPortBase, pThis->IOPortBase);
1107 rc = CFGMR3QueryPortDef(pCfg, "Base", &pThis->IOPortBase, 0x70);
1130 u8Irq, pThis->IOPortBase, fGCEnabled, fR0Enabled));
1196 rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase, 4, NULL,
1202 rc = PDMDevHlpIOPortRegisterRC(pDevIns, pThis->IOPortBase, 4, NIL_RTRCPTR,
1209 rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->IOPortBase, 4, NIL_RTR0PTR,