Cross Reference: /vbox/src/VBox/Devices/PC/DevLPC.cpp

Lines Matching defs:dev
66     PCIDEVICE      dev;
186     if (pThis->dev.config[0xde] == 0xbe && pThis->dev.config[0xad] == 0xef)
190                         pThis->dev.config[0xde], pThis->dev.config[0xad]);
197         uint8_t  iMap = PCIDevGetByte(&pThis->dev, iBase + iLine);
220     PCIDevSetVendorId         (&pThis->dev, 0x8086); /* Intel */
221     PCIDevSetDeviceId         (&pThis->dev, 0x27b9);
222     PCIDevSetCommand          (&pThis->dev, PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS | PCI_COMMAND_BUSMASTER);
223     PCIDevSetRevisionId       (&pThis->dev, 0x02);
224     PCIDevSetClassSub         (&pThis->dev, 0x01); /* PCI-to-ISA Bridge */
225     PCIDevSetClassBase        (&pThis->dev, 0x06); /* Bridge */
226     PCIDevSetHeaderType       (&pThis->dev, 0x80); /* normal, multifunction device (so that other devices can be its functions) */
227     PCIDevSetSubSystemVendorId(&pThis->dev, 0x8086);
228     PCIDevSetSubSystemId      (&pThis->dev, 0x7270);
229     PCIDevSetInterruptPin     (&pThis->dev, 0x00); /* The LPC device itself generates no interrupts */
230     PCIDevSetStatus           (&pThis->dev, 0x0200); /* PCI_status_devsel_medium */
240     pThis->dev.config[0x40] = 0x01; /* IO space */
241     pThis->dev.config[0x41] = 0x80; /* base address / 128, see DevACPI.cpp */
244     pThis->dev.config[0x44] = 0x00 | (1<<7); /* SCI is IRQ9, ACPI enabled */
248     pThis->dev.config[0x4c] = 0x4d;
250     pThis->dev.config[0x4e] = 0x03;
251     pThis->dev.config[0x4f] = 0x00;
254     pThis->dev.config[0x60] = 0x0b; /* PCI A -> IRQ 11 */
255     pThis->dev.config[0x61] = 0x09; /* PCI B -> IRQ 9  */
256     pThis->dev.config[0x62] = 0x0b; /* PCI C -> IRQ 11 */
257     pThis->dev.config[0x63] = 0x09; /* PCI D -> IRQ 9  */
260     pThis->dev.config[0x64] = 0x10;
263     pThis->dev.config[0x68] = 0x80;
264     pThis->dev.config[0x69] = 0x80;
265     pThis->dev.config[0x6A] = 0x80;
266     pThis->dev.config[0x6B] = 0x80;
269     pThis->dev.config[0x70] = 0x80;
270     pThis->dev.config[0x76] = 0x0c;
271     pThis->dev.config[0x77] = 0x0c;
272     pThis->dev.config[0x78] = 0x02;
273     pThis->dev.config[0x79] = 0x00;
282     pThis->dev.config[0xa0] = 0x08;
283     pThis->dev.config[0xa2] = 0x00;
284     pThis->dev.config[0xa3] = 0x00;
285     pThis->dev.config[0xa4] = 0x00;
286     pThis->dev.config[0xa5] = 0x00;
287     pThis->dev.config[0xa6] = 0x00;
288     pThis->dev.config[0xa7] = 0x00;
289     pThis->dev.config[0xa8] = 0x0f;
290     pThis->dev.config[0xaa] = 0x00;
291     pThis->dev.config[0xab] = 0x00;
292     pThis->dev.config[0xac] = 0x00;
293     pThis->dev.config[0xae] = 0x00;
305     pThis->dev.config[0xf0] = (uint8_t)(RCBA_BASE | 1); /* enabled */
306     pThis->dev.config[0xf1] = (uint8_t)(RCBA_BASE >> 8);
307     pThis->dev.config[0xf2] = (uint8_t)(RCBA_BASE >> 16);
308     pThis->dev.config[0xf3] = (uint8_t)(RCBA_BASE >> 24);
310     rc = PDMDevHlpPCIRegister (pDevIns, &pThis->dev);