Lines Matching defs:page

60 /** @page pg_dev_dma     DMA Overview and notes
68 * - DMA transfers must occur within a 64KB/128KB 'page'
72 * offsets (except for the page registers) are therefore "double spaced".
119 uint8_t au8PageHi[8]; /* High page registers (A24-A31). */
194 /* Map a DMA page register offset (0-7) to channel index (0-3). */
198 /* Map a channel index (0-3) to DMA page register offset (0-7). */
200 /* Map a channel number (0-7) to DMA page register offset (0-7). */
439 /** DMA page registers. There are 16 R/W page registers for compatibility with
440 * the IBM PC/AT; only some of those registers are used for DMA. The page register
453 Log2(("Read %#x (byte) from page register %#x (channel %d)\n",
462 Log2(("Read %#x (word) from page register %#x (channel %d)\n",
480 dc->au8PageHi[reg] = 0; /* Corresponding high page cleared. */
481 Log2(("Wrote %#x to page register %#x (channel %d)\n",
489 dc->au8PageHi[reg] = 0; /* Corresponding high page cleared. */
492 dc->au8PageHi[reg] = 0; /* Corresponding high page cleared. */
497 Log(("Bad size write to page register %#x (size %d, data %#x)\n",
504 * EISA style high page registers, for extending the DMA addresses to cover
516 Log2(("Read %#x to from high page register %#x (channel %d)\n",
533 Log2(("Wrote %#x to high page register %#x (channel %d)\n",
539 Log(("Bad size write to high page register %#x (size %d, data %#x)\n",
674 uint32_t page, pagehi;
682 page = dc->au8Page[DMACH2PG(uChannel)] & ~dc->is16bit;
684 addr = (pagehi << 24) | (page << 16) | (ch->u16CurAddr << dc->is16bit);
710 uint32_t page, pagehi;
723 page = dc->au8Page[DMACH2PG(uChannel)] & ~dc->is16bit;
725 addr = (pagehi << 24) | (page << 16) | (ch->u16CurAddr << dc->is16bit);
791 /* NB: The page and address registers are unaffected by a reset
820 /* Optional EISA style high page registers (address bits 24-31). */
899 /* Remap page register contents. */