Cross Reference: /vbox/src/VBox/Devices/Network/DevPCNet.cpp

Lines Matching defs:aBCR
160 #define BCR_DWIO(S)      !!((S)->aBCR[BCR_BSBC] & 0x0080)
161 #define BCR_SSIZE32(S)   !!((S)->aBCR[BCR_SWS ] & 0x0100)
162 #define BCR_SWSTYLE(S)     ((S)->aBCR[BCR_SWS ] & 0x00FF)
329     uint16_t                            aBCR[BCR_MAX_RAP];
2274          PCNET_INST_NR, pThis->aBCR[BCR_SWS]));
2287          PCNET_INST_NR, pThis->aBCR[BCR_SWS]));
3041             pThis->aBCR[u32RAP] = val;
3046             pThis->aBCR[BCR_STVAL] = val;
3052             pThis->aMII[pThis->aBCR[BCR_MIIADDR] & 0x1f] = val;
3054             Log(("#%d pcnet: mii write %d <- %#x\n", PCNET_INST_NR, pThis->aBCR[BCR_MIIADDR] & 0x1f, val));
3070     autoneg = (pThis->aBCR[BCR_MIICAS] & 0x20) != 0;
3071     duplex  = (pThis->aBCR[BCR_MIICAS] & 0x10) != 0;
3072     fast    = (pThis->aBCR[BCR_MIICAS] & 0x08) != 0;
3188             val = pThis->aBCR[u32RAP] & ~0x8000;
3200             if (pThis->fAm79C973 && (pThis->aBCR[BCR_MIIADDR] >> 5 & 0x1f) == 0)
3202                 uint32_t miiaddr = pThis->aBCR[BCR_MIIADDR] & 0x1f;
3210             val = u32RAP < BCR_MAX_RAP ? pThis->aBCR[u32RAP] : 0;
3237     pThis->aBCR[BCR_MSRDA] = 0x0005;
3238     pThis->aBCR[BCR_MSWRA] = 0x0005;
3239     pThis->aBCR[BCR_MC   ] = 0x0002;
3240     pThis->aBCR[BCR_LNKST] = 0x00c0;
3241     pThis->aBCR[BCR_LED1 ] = 0x0084;
3242     pThis->aBCR[BCR_LED2 ] = 0x0088;
3243     pThis->aBCR[BCR_LED3 ] = 0x0090;
3244     pThis->aBCR[BCR_FDC  ] = 0x0000;
3245     pThis->aBCR[BCR_BSBC ] = 0x9001;
3246     pThis->aBCR[BCR_EECAS] = 0x0002;
3247     pThis->aBCR[BCR_STVAL] = 0xffff;
3249     pThis->aBCR[BCR_SWS  ] = 0x0200;
3251     pThis->aBCR[BCR_PLAT ] = 0xff06;
3252     pThis->aBCR[BCR_MIIADDR ] = 0;  /* Internal PHY on Am79C973 would be (0x1e << 5) */
3253     pThis->aBCR[BCR_PCIVID] = PCIDevGetVendorId(&pThis->PciDev);
3254     pThis->aBCR[BCR_PCISID] = PCIDevGetSubSystemId(&pThis->PciDev);
3255     pThis->aBCR[BCR_PCISVID] = PCIDevGetSubSystemVendorId(&pThis->PciDev);
3799     TMTimerSetNano(pThis->CTX_SUFF(pTimerSoftInt), 12800U * (pThis->aBCR[BCR_STVAL] & 0xffff));
4228     SSMR3PutMem(pSSM, pThis->aBCR, sizeof(pThis->aBCR));
4315         SSMR3GetMem(pSSM, &pThis->aBCR, sizeof(pThis->aBCR));
4830     Assert(RT_ELEMENTS(pThis->aBCR) == BCR_MAX_RAP);