Lines Matching defs:pVdma
59 static DECLCALLBACK(int) vboxCmdVBVACmdCallout(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd, VBOXCRCMDCTL_CALLOUT_LISTENTRY *pEntry, PFNVBOXCRCMDCTL_CALLOUT_CB pfnCb);
975 static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource);
1101 static int vboxVDMACrHgcmSubmitSync(struct VBOXVDMAHOST *pVdma, VBOXCRCMDCTL* pCtl, uint32_t cbCtl)
1114 PVGASTATE pVGAState = pVdma->pVGAState;
1140 static int vdmaVBVACtlDisableSync(PVBOXVDMAHOST pVdma)
1144 int rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
1151 vgaUpdateDisplayAll(pVdma->pVGAState, /* fFailOnResize = */ false);
1158 struct VBOXVDMAHOST *pVdma = hClient;
1159 if (!pVdma->pCurRemainingHostCtl)
1162 VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1166 VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pVdma->pCurRemainingHostCtl, prevCmdRc);
1169 pVdma->pCurRemainingHostCtl = VBoxVBVAExHPCheckHostCtlOnDisable(&pVdma->CmdVbva);
1170 if (pVdma->pCurRemainingHostCtl)
1172 *pcbCtl = pVdma->pCurRemainingHostCtl->u.cmd.cbCmd;
1173 return pVdma->pCurRemainingHostCtl->u.cmd.pu8Cmd;
1182 struct VBOXVDMAHOST *pVdma = hClient;
1183 Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
1184 Assert(pVdma->Thread.u32State == VBOXVDMATHREAD_STATE_TERMINATING);
1189 struct VBOXVDMAHOST *pVdma = hClient;
1192 int rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
1194 pHgcmEnableData->hRHCmd = pVdma;
1208 static int vboxVDMACrHgcmHandleEnable(struct VBOXVDMAHOST *pVdma)
1212 Enable.Data.hRHCmd = pVdma;
1215 int rc = vboxVDMACrHgcmSubmitSync(pVdma, &Enable.Hdr, sizeof (Enable));
1216 Assert(!pVdma->pCurRemainingHostCtl);
1219 Assert(!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1223 Assert(VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1229 static int vdmaVBVAEnableProcess(struct VBOXVDMAHOST *pVdma, uint32_t u32Offset)
1231 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1237 VBVABUFFER *pVBVA = (VBVABUFFER *)HGSMIOffsetToPointerHost(pVdma->pHgsmi, u32Offset);
1244 if (!pVdma->CrSrvInfo.pfnEnable)
1252 int rc = VBoxVBVAExHSEnable(&pVdma->CmdVbva, pVBVA);
1257 Disable.Data.hNotifyTerm = pVdma;
1260 rc = vboxVDMACrHgcmSubmitSync(pVdma, &Disable.Hdr, sizeof (Disable));
1263 PVGASTATE pVGAState = pVdma->pVGAState;
1269 rc = pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info);
1275 vboxVDMACrHgcmHandleEnable(pVdma);
1280 VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1288 static int vdmaVBVADisableProcess(struct VBOXVDMAHOST *pVdma, bool fDoHgcmEnable)
1290 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1296 int rc = pVdma->CrSrvInfo.pfnDisable(pVdma->CrSrvInfo.hSvr);
1301 PVGASTATE pVGAState = pVdma->pVGAState;
1306 rc = vboxVDMACrHgcmHandleEnable(pVdma);
1318 pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info);
1327 static int vboxVDMACrHostCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd, bool *pfContinue)
1335 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1340 return pVdma->CrSrvInfo.pfnHostCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd);
1344 int rc = vdmaVBVADisableProcess(pVdma, true);
1351 return VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, false);
1355 int rc = vdmaVBVADisableProcess(pVdma, false);
1362 rc = VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, true);
1374 PVGASTATE pVGAState = pVdma->pVGAState;
1376 int rc = VBoxVBVAExHSSaveState(&pVdma->CmdVbva, pu8VramBase, pCmd->u.state.pSSM);
1382 return pVdma->CrSrvInfo.pfnSaveState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM);
1386 PVGASTATE pVGAState = pVdma->pVGAState;
1389 int rc = VBoxVBVAExHSLoadState(&pVdma->CmdVbva, pu8VramBase, pCmd->u.state.pSSM, pCmd->u.state.u32Version);
1396 rc = pVdma->CrSrvInfo.pfnLoadState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM, pCmd->u.state.u32Version);
1407 PVGASTATE pVGAState = pVdma->pVGAState;
1437 static int vboxVDMACrGuestCtlResizeEntryProcess(struct VBOXVDMAHOST *pVdma, VBOXCMDVBVA_RESIZE_ENTRY *pEntry)
1439 PVGASTATE pVGAState = pVdma->pVGAState;
1479 rc = pVdma->CrSrvInfo.pfnResize(pVdma->CrSrvInfo.hSvr, &Screen, aTargetMap);
1529 static int vboxVDMACrGuestCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd)
1536 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1541 return pVdma->CrSrvInfo.pfnGuestCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd);
1545 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1573 rc = vboxVDMACrGuestCtlResizeEntryProcess(pVdma, pEntry);
1588 int rc = vdmaVBVAEnableProcess(pVdma, u32Offset);
1597 rc = VBoxVBVAExHPPause(&pVdma->CmdVbva);
1609 int rc = vdmaVBVADisableProcess(pVdma, true);
1617 VMR3ReqCallNoWait(PDMDevHlpGetVM(pVdma->pVGAState->pDevInsR3), VMCPUID_ANY,
1618 (PFNRT)vgaUpdateDisplayAll, 2, pVdma->pVGAState, /* fFailOnResize = */ false);
1620 return VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, false);
1778 static int8_t vboxVDMACrCmdVbvaProcessCmdData(struct VBOXVDMAHOST *pVdma, const VBOXCMDVBVA_HDR *pCmd, uint32_t cbCmd)
1786 PVGASTATE pVGAState = pVdma->pVGAState;
1812 PVGASTATE pVGAState = pVdma->pVGAState;
1822 return pVdma->CrSrvInfo.pfnCmd(pVdma->CrSrvInfo.hSvr, pCmd, cbCmd);
1845 static int8_t vboxVDMACrCmdVbvaProcess(struct VBOXVDMAHOST *pVdma, const VBOXCMDVBVA_HDR *pCmd, uint32_t cbCmd)
1869 PVGASTATE pVGAState = pVdma->pVGAState;
1886 uint8_t i8Result = vboxVDMACrCmdVbvaProcessCmdData(pVdma, pRealCmdHdr, cbRealCmd);
2022 int8_t i8Result = vboxVDMACrCmdVbvaProcess(pVdma, pCmd, cbCurCmd);
2032 return vboxVDMACrCmdVbvaProcessCmdData(pVdma, pCmd, cbCmd);
2036 static void vboxVDMACrCmdProcess(struct VBOXVDMAHOST *pVdma, uint8_t* pu8Cmd, uint32_t cbCmd)
2056 pCmd->u.i8Result = vboxVDMACrCmdVbvaProcess(pVdma, pCmd, cbCmd);
2059 static int vboxVDMACrCtlHgsmiSetup(struct VBOXVDMAHOST *pVdma)
2066 PVGASTATE pVGAState = pVdma->pVGAState;
2070 pCmd->CrClientInfo.hClient = pVdma;
2077 pVdma->CrSrvInfo = pCmd->CrCmdServerInfo;
2088 memset(&pVdma->CrSrvInfo, 0, sizeof (pVdma->CrSrvInfo));
2093 static int vboxVDMACmdExecBpbTransfer(PVBOXVDMAHOST pVdma, const PVBOXVDMACMD_DMA_BPB_TRANSFER pTransfer, uint32_t cbBuffer);
2096 static int vboxVDMACmdCheckCrCmd(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pCmdDr, uint32_t cbCmdDr)
2100 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2124 if (offBuf + cbDmaCmd > pVdma->pVGAState->vram_size)
2147 PVGASTATE pVGAState = pVdma->pVGAState;
2160 int tmpRc = VBoxSHGSMICommandComplete (pVdma->pHgsmi, pCmdDr);
2173 rc = vboxVDMACmdExecBpbTransfer(pVdma, pTransfer, sizeof (*pTransfer));
2178 rc = VBoxSHGSMICommandComplete (pVdma->pHgsmi, pCmdDr);
2218 static int vboxVDMACmdExecBltPerform(PVBOXVDMAHOST pVdma,
2303 static int vboxVDMACmdExecBlt(PVBOXVDMAHOST pVdma, const PVBOXVDMACMD_DMA_PRESENT_BLT pBlt, uint32_t cbBuffer)
2319 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2348 int rc = vboxVDMACmdExecBltPerform(pVdma, pvRam + pBlt->offDst, pvRam + pBlt->offSrc,
2361 int rc = vboxVDMACmdExecBltPerform(pVdma, pvRam + pBlt->offDst, pvRam + pBlt->offSrc,
2375 static int vboxVDMACmdExecBpbTransfer(PVBOXVDMAHOST pVdma, const PVBOXVDMACMD_DMA_BPB_TRANSFER pTransfer, uint32_t cbBuffer)
2380 PVGASTATE pVGAState = pVdma->pVGAState;
2384 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2459 static int vboxVDMACmdExec(PVBOXVDMAHOST pVdma, const uint8_t *pvBuffer, uint32_t cbBuffer)
2498 int cbBlt = vboxVDMACmdExecBlt(pVdma, pBlt, cbBuffer);
2518 int cbTransfer = vboxVDMACmdExecBpbTransfer(pVdma, pTransfer, cbBuffer);
2552 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvUser;
2553 PVGASTATE pVGAState = pVdma->pVGAState;
2554 VBVAEXHOSTCONTEXT *pCmdVbva = &pVdma->CmdVbva;
2555 PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi;
2560 VBoxVDMAThreadNotifyConstructSucceeded(&pVdma->Thread, pvUser);
2562 while (!VBoxVDMAThreadIsTerminating(&pVdma->Thread))
2568 vboxVDMACrCmdProcess(pVdma, pCmd, cbCmd);
2573 rc = vboxVDMACrGuestCtlProcess(pVdma, (VBVAEXHOSTCTL*)pCmd);
2579 rc = vboxVDMACrHostCtlProcess(pVdma, (VBVAEXHOSTCTL*)pCmd, &fContinue);
2585 rc = VBoxVDMAThreadEventWait(&pVdma->Thread, RT_INDEFINITE_WAIT);
2594 VBoxVDMAThreadNotifyTerminatingSucceeded(&pVdma->Thread, pvUser);
2599 static void vboxVDMACommandProcess(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd)
2601 PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi;
2609 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2615 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2645 rc = vboxVDMACmdExec(pVdma, pvBuf, pCmd->cbBuf);
2658 static void vboxVDMAControlProcess(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd)
2660 PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi;
2671 VBOXVDMAHOST *pVdma = (VBOXVDMAHOST *)pvUser;
2672 PVGASTATE pVGAState = pVdma->pVGAState;
2676 static int vboxVDMAWatchDogCtl(struct VBOXVDMAHOST *pVdma, uint32_t cMillis)
2678 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2680 TMTimerSetMillies(pVdma->WatchDogTimer, cMillis);
2682 TMTimerStop(pVdma->WatchDogTimer);
2690 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)RTMemAllocZ(sizeof(*pVdma));
2691 Assert(pVdma);
2692 if (pVdma)
2694 pVdma->pHgsmi = pVGAState->pHGSMI;
2695 pVdma->pVGAState = pVGAState;
2699 pVdma, TMTIMER_FLAGS_NO_CRIT_SECT,
2700 "VDMA WatchDog Timer", &pVdma->WatchDogTimer);
2705 VBoxVDMAThreadInit(&pVdma->Thread);
2707 rc = RTSemEventMultiCreate(&pVdma->HostCrCtlCompleteEvent);
2710 rc = VBoxVBVAExHSInit(&pVdma->CmdVbva);
2713 rc = RTCritSectInit(&pVdma->CalloutCritSect);
2716 pVGAState->pVdma = pVdma;
2717 int rcIgnored = vboxVDMACrCtlHgsmiSetup(pVdma); NOREF(rcIgnored); /** @todo is this ignoring intentional? */
2720 RTCritSectDelete(&pVdma->CalloutCritSect);
2725 VBoxVBVAExHSTerm(&pVdma->CmdVbva);
2730 RTSemEventMultiDestroy(pVdma->HostCrCtlCompleteEvent);
2736 RTMemFree(pVdma);
2738 pVGAState->pVdma = pVdma;
2748 int vboxVDMAReset(struct VBOXVDMAHOST *pVdma)
2751 vdmaVBVACtlDisableSync(pVdma);
2756 int vboxVDMADestruct(struct VBOXVDMAHOST *pVdma)
2758 if (!pVdma)
2761 vdmaVBVACtlDisableSync(pVdma);
2762 VBoxVDMAThreadCleanup(&pVdma->Thread);
2763 VBoxVBVAExHSTerm(&pVdma->CmdVbva);
2764 RTSemEventMultiDestroy(pVdma->HostCrCtlCompleteEvent);
2765 RTCritSectDelete(&pVdma->CalloutCritSect);
2767 RTMemFree(pVdma);
2771 void vboxVDMAControl(struct VBOXVDMAHOST *pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd)
2773 PHGSMIINSTANCE pIns = pVdma->pHgsmi;
2788 pCmd->i32Result = vboxVDMAWatchDogCtl(pVdma, pCmd->u32Offset);
2800 void vboxVDMACommand(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd)
2807 rc = vboxVDMACmdCheckCrCmd(pVdma, pCmd, cbCmd);
2814 rc = VBoxSHGSMICommandComplete (pVdma->pHgsmi, pCmd);
2819 vboxVDMACommandProcess(pVdma, pCmd, cbCmd);
2822 rc = VBoxSHGSMICommandComplete (pVdma->pHgsmi, pCmd);
2832 static int vdmaVBVACtlSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
2834 int rc = VBoxVBVAExHCtlSubmit(&pVdma->CmdVbva, pCtl, enmSource, pfnComplete, pvComplete);
2838 return VBoxVDMAThreadEventNotify(&pVdma->Thread);
2850 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvContext;
2855 Assert(pVdma->pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD);
2856 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pGCtl);
2862 static int vdmaVBVACtlGenericSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL_SOURCE enmSource, VBVAEXHOSTCTL_TYPE enmType, uint8_t* pu8Cmd, uint32_t cbCmd, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
2864 VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, enmType);
2873 int rc = vdmaVBVACtlSubmit(pVdma, pHCtl, enmSource, pfnComplete, pvComplete);
2876 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
2883 static int vdmaVBVACtlGenericGuestSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL_TYPE enmType, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl)
2887 int rc = vdmaVBVACtlGenericSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_GUEST, enmType, (uint8_t*)(pCtl+1), cbCtl - sizeof (VBOXCMDVBVA_CTL), vboxCmdVBVACmdCtlGuestCompletion, pVdma);
2893 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl);
2906 static int vdmaVBVACtlOpaqueHostSubmit(PVBOXVDMAHOST pVdma, struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
2911 int rc = vdmaVBVACtlGenericSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_HOST, VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE, (uint8_t*)pCmd, cbCmd, vboxCmdVBVACmdCtlHostCompletion, pvCompletion);
2917 PVGASTATE pVGAState = pVdma->pVGAState;
2961 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvThreadContext;
2966 rc = vboxVDMACrGuestCtlProcess(pVdma, pHCtl);
2973 PVGASTATE pVGAState = pVdma->pVGAState;
2975 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
2986 VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pHCtl, rc);
2989 static int vdmaVBVACtlEnableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable, bool fPaused, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
2992 VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, fPaused ? VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED : VBVAEXHOSTCTL_TYPE_GHH_ENABLE);
3000 rc = VBoxVDMAThreadCreate(&pVdma->Thread, vboxVDMAWorkerThread, pVdma, vdmaVBVACtlThreadCreatedEnable, pHCtl);
3006 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3017 static int vdmaVBVACtlEnableSubmitSync(PVBOXVDMAHOST pVdma, uint32_t offVram, bool fPaused)
3032 rc = vdmaVBVACtlEnableSubmitInternal(pVdma, &Enable, fPaused, vdmaVBVACtlSubmitSyncCompletion, &Data);
3053 static int vdmaVBVACtlDisableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3057 if (VBoxVBVAExHSIsDisabled(&pVdma->CmdVbva))
3063 pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_GHH_DISABLE);
3072 rc = vdmaVBVACtlSubmit(pVdma, pHCtl, VBVAEXHOSTCTL_SOURCE_GUEST, pfnComplete, pvComplete);
3077 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3081 static int vdmaVBVACtlEnableDisableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3085 return vdmaVBVACtlEnableSubmitInternal(pVdma, pEnable, false, pfnComplete, pvComplete);
3086 return vdmaVBVACtlDisableSubmitInternal(pVdma, pEnable, pfnComplete, pvComplete);
3089 static int vdmaVBVACtlEnableDisableSubmit(PVBOXVDMAHOST pVdma, VBOXCMDVBVA_CTL_ENABLE *pEnable)
3092 int rc = vdmaVBVACtlEnableDisableSubmitInternal(pVdma, &pEnable->Enable, vboxCmdVBVACmdCtlGuestCompletion, pVdma);
3098 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, &pEnable->Hdr);
3112 static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource)
3123 rc = vdmaVBVACtlSubmit(pVdma, pCtl, enmSource, vdmaVBVACtlSubmitSyncCompletion, &Data);
3144 static int vdmaVBVAPause(PVBOXVDMAHOST pVdma)
3148 return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST);
3151 static int vdmaVBVAResume(PVBOXVDMAHOST pVdma)
3155 return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST);
3158 static int vboxVDMACmdSubmitPerform(struct VBOXVDMAHOST *pVdma)
3160 int rc = VBoxVBVAExHSCheckCommands(&pVdma->CmdVbva);
3164 return VBoxVDMAThreadEventNotify(&pVdma->Thread);
3182 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3184 return vdmaVBVACtlOpaqueHostSubmit(pVdma, pCmd, cbCmd, pfnCompletion, pvCompletion);
3189 struct VBOXVDMAHOST *pVdma;
3200 struct VBOXVDMAHOST *pVdma = pData->pVdma;
3202 ASMAtomicIncS32(&pVdma->i32cHostCrCtlCompleted);
3206 RTSemEventMultiSignal(pVdma->HostCrCtlCompleteEvent);
3209 static DECLCALLBACK(int) vboxCmdVBVACmdCallout(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd, VBOXCRCMDCTL_CALLOUT_LISTENTRY *pEntry, PFNVBOXCRCMDCTL_CALLOUT_CB pfnCb)
3212 int rc = RTCritSectEnter(&pVdma->CalloutCritSect);
3216 RTCritSectLeave(&pVdma->CalloutCritSect);
3218 RTSemEventMultiSignal(pVdma->HostCrCtlCompleteEvent);
3227 static int vboxCmdVBVACmdCalloutProcess(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd)
3232 rc = RTCritSectEnter(&pVdma->CalloutCritSect);
3238 RTCritSectLeave(&pVdma->CalloutCritSect);
3259 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3261 Data.pVdma = pVdma;
3265 int rc = vdmaVBVACtlOpaqueHostSubmit(pVdma, pCmd, cbCmd, vboxCmdVBVACmdHostCtlSyncCb, &Data);
3275 RTSemEventMultiWait(pVdma->HostCrCtlCompleteEvent, 500);
3277 vboxCmdVBVACmdCalloutProcess(pVdma, pCmd);
3284 vboxCmdVBVACmdCalloutProcess(pVdma, pCmd);
3291 int32_t c = ASMAtomicDecS32(&pVdma->i32cHostCrCtlCompleted);
3294 RTSemEventMultiReset(pVdma->HostCrCtlCompleteEvent);
3305 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3310 return vdmaVBVACtlGenericGuestSubmit(pVdma, VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE, pCtl, cbCtl);
3312 return vdmaVBVACtlGenericGuestSubmit(pVdma, VBVAEXHOSTCTL_TYPE_GHH_RESIZE, pCtl, cbCtl);
3320 return vdmaVBVACtlEnableDisableSubmit(pVdma, (VBOXCMDVBVA_CTL_ENABLE*)pCtl);
3328 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl);
3335 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3341 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3347 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3352 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3357 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3359 vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3364 return VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva);
3368 int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM)
3371 int rc = vdmaVBVAPause(pVdma);
3385 PVGASTATE pVGAState = pVdma->pVGAState;
3406 int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM)
3409 int rc = vdmaVBVAResume(pVdma);
3423 PVGASTATE pVGAState = pVdma->pVGAState;
3444 int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM)
3449 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3458 PVGASTATE pVGAState = pVdma->pVGAState;
3461 rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t*)pVdma->CmdVbva.pVBVA) - pu8VramBase));
3468 return vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
3472 int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version)
3481 rc = vdmaVBVACtlEnableSubmitSync(pVdma, u32, true);
3484 Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_ESTATE_PAUSED);
3490 rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
3493 rc = vdmaVBVAResume(pVdma);
3506 int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma)
3509 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3514 VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_HH_LOADSTATE_DONE);
3526 int rc = vdmaVBVACtlSubmit(pVdma, pHCtl, VBVAEXHOSTCTL_SOURCE_HOST, NULL, NULL);
3530 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);