Lines Matching defs:pVGAState
156 static DECLCALLBACK(int) vdmaVBVANotifyDisable(PVGASTATE pVGAState);
805 PVGASTATE pVGAState;
977 typedef DECLCALLBACK(void) FNVBOXVDMACRCTL_CALLBACK(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, void* pvContext);
1029 static DECLCALLBACK(void) vboxVDMACrCtlCbSetEvent(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, void* pvContext)
1034 static DECLCALLBACK(void) vboxVDMACrCtlCbReleaseCmd(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, void* pvContext)
1040 static int vboxVDMACrCtlPostAsync (PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, uint32_t cbCmd, PFNVBOXVDMACRCTL_CALLBACK pfnCompletion, void *pvCompletion)
1042 if ( pVGAState->pDrv
1043 && pVGAState->pDrv->pfnCrHgsmiControlProcess)
1048 pVGAState->pDrv->pfnCrHgsmiControlProcess(pVGAState->pDrv, pCmd, cbCmd);
1057 static int vboxVDMACrCtlPost(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, uint32_t cbCmd)
1064 rc = vboxVDMACrCtlPostAsync(pVGAState, pCmd, cbCmd, vboxVDMACrCtlCbSetEvent, (void*)hComplEvent);
1114 PVGASTATE pVGAState = pVdma->pVGAState;
1115 rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCtl, cbCtl, vboxVDMACrHgcmSubmitSyncCompletion, &Data);
1151 vgaUpdateDisplayAll(pVdma->pVGAState, /* fFailOnResize = */ false);
1263 PVGASTATE pVGAState = pVdma->pVGAState;
1265 Info.hCltScr = pVGAState->pDrv;
1266 Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin;
1267 Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess;
1268 Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd;
1301 PVGASTATE pVGAState = pVdma->pVGAState;
1309 vdmaVBVANotifyDisable(pVGAState);
1314 Info.hCltScr = pVGAState->pDrv;
1315 Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin;
1316 Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess;
1317 Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd;
1374 PVGASTATE pVGAState = pVdma->pVGAState;
1375 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;
1386 PVGASTATE pVGAState = pVdma->pVGAState;
1387 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;
1407 PVGASTATE pVGAState = pVdma->pVGAState;
1409 for (uint32_t i = 0; i < pVGAState->cMonitors; ++i)
1414 int rc = VBVAGetInfoViewAndScreen(pVGAState, i, &CurView, &CurScreen);
1421 rc = VBVAInfoScreen(pVGAState, &CurScreen);
1439 PVGASTATE pVGAState = pVdma->pVGAState;
1449 ASMBitClearRange(aTargetMap, pVGAState->cMonitors, VBOX_VIDEO_MAX_SCREENS);
1459 if (u32ViewIndex > pVGAState->cMonitors)
1486 for (int i = ASMBitFirstSet(aTargetMap, pVGAState->cMonitors);
1488 i = ASMBitNextSet(aTargetMap, pVGAState->cMonitors, i))
1495 rc = VBVAGetInfoViewAndScreen(pVGAState, i, &CurView, &CurScreen);
1505 rc = VBVAInfoView(pVGAState, &View);
1513 rc = VBVAInfoScreen(pVGAState, &Screen);
1617 VMR3ReqCallNoWait(PDMDevHlpGetVM(pVdma->pVGAState->pDevInsR3), VMCPUID_ANY,
1618 (PFNRT)vgaUpdateDisplayAll, 2, pVdma->pVGAState, /* fFailOnResize = */ false);
1685 static int8_t vboxVDMACrCmdVbvaPagingDataInit(PVGASTATE pVGAState, const VBOXCMDVBVA_HDR *pHdr, const VBOXCMDVBVA_PAGING_TRANSFER_DATA *pData, uint32_t cbCmd,
1711 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;
1712 uint8_t *pu8VramMax = pu8VramBase + pVGAState->vram_size;
1713 if (offVRAM >= pVGAState->vram_size)
1725 if (offVRAM + ((VBOXCMDVBVAOFFSET)cPages << PAGE_SHIFT) >= pVGAState->vram_size)
1741 static int8_t vboxVDMACrCmdVbvaPagingFill(PVGASTATE pVGAState, VBOXCMDVBVA_PAGING_FILL *pFill)
1750 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;
1751 uint8_t *pu8VramMax = pu8VramBase + pVGAState->vram_size;
1752 if (offVRAM >= pVGAState->vram_size)
1760 if (offVRAM + cbFill >= pVGAState->vram_size)
1786 PVGASTATE pVGAState = pVdma->pVGAState;
1791 int8_t i8Result = vboxVDMACrCmdVbvaPagingDataInit(pVGAState, pCmd, &((VBOXCMDVBVA_PAGING_TRANSFER*)pCmd)->Data, cbCmd,
1800 PPDMDEVINS pDevIns = pVGAState->pDevInsR3;
1812 PVGASTATE pVGAState = pVdma->pVGAState;
1819 return vboxVDMACrCmdVbvaPagingFill(pVGAState, (VBOXCMDVBVA_PAGING_FILL*)pCmd);
1869 PVGASTATE pVGAState = pVdma->pVGAState;
1870 PPDMDEVINS pDevIns = pVGAState->pDevInsR3;
1933 i8Result = vboxVDMACrCmdVbvaPagingDataInit(pVGAState, pRealCmdHdr, (const VBOXCMDVBVA_PAGING_TRANSFER_DATA*)pvCurCmdTail, cbRealCmd,
2066 PVGASTATE pVGAState = pVdma->pVGAState;
2067 pCmd->pvVRamBase = pVGAState->vram_ptrR3;
2068 pCmd->cbVRam = pVGAState->vram_size;
2069 pCmd->pLed = &pVGAState->Led3D;
2072 rc = vboxVDMACrCtlPost(pVGAState, &pCmd->Hdr, sizeof (*pCmd));
2100 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2124 if (offBuf + cbDmaCmd > pVdma->pVGAState->vram_size)
2147 PVGASTATE pVGAState = pVdma->pVGAState;
2149 if (pVGAState->pDrv->pfnCrHgsmiCommandProcess)
2152 pVGAState->pDrv->pfnCrHgsmiCommandProcess(pVGAState->pDrv, pCrCmd, cbBody);
2193 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
2194 PHGSMIINSTANCE pIns = pVGAState->pHGSMI;
2200 Assert(pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD);
2208 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
2213 pCmdPrivate->pfnCompletion(pVGAState, pCmd, pCmdPrivate->pvCompletion);
2319 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2380 PVGASTATE pVGAState = pVdma->pVGAState;
2381 uint8_t * pvRam = pVGAState->vram_ptrR3;
2384 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2553 PVGASTATE pVGAState = pVdma->pVGAState;
2570 VBVARaiseIrqNoWait(pVGAState, 0);
2609 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2615 uint8_t * pvRam = pVdma->pVGAState->vram_ptrR3;
2672 PVGASTATE pVGAState = pVdma->pVGAState;
2673 VBVARaiseIrq(pVGAState, HGSMIHOSTFLAGS_WATCHDOG);
2678 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
2687 int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements)
2694 pVdma->pHgsmi = pVGAState->pHGSMI;
2695 pVdma->pVGAState = pVGAState;
2698 rc = PDMDevHlpTMTimerCreate(pVGAState->pDevInsR3, TMCLOCK_REAL, vboxVDMAWatchDogTimer,
2716 pVGAState->pVdma = pVdma;
2738 pVGAState->pVdma = pVdma;
2855 Assert(pVdma->pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD);
2917 PVGASTATE pVGAState = pVdma->pVGAState;
2918 rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCmd, cbCmd, pfnCompletion, pvCompletion);
2931 static DECLCALLBACK(int) vdmaVBVANotifyEnable(PVGASTATE pVGAState)
2933 for (uint32_t i = 0; i < pVGAState->cMonitors; i++)
2935 int rc = pVGAState->pDrv->pfnVBVAEnable (pVGAState->pDrv, i, NULL, true);
2941 pVGAState->pDrv->pfnVBVADisable (pVGAState->pDrv, j);
2950 static DECLCALLBACK(int) vdmaVBVANotifyDisable(PVGASTATE pVGAState)
2952 for (uint32_t i = 0; i < pVGAState->cMonitors; i++)
2954 pVGAState->pDrv->pfnVBVADisable (pVGAState->pDrv, i);
2973 PVGASTATE pVGAState = pVdma->pVGAState;
2976 vdmaVBVANotifyEnable(pVGAState);
2978 vdmaVBVANotifyDisable(pVGAState);
3181 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
3182 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3258 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
3259 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3303 int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl)
3305 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3333 int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState)
3335 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3341 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3344 int vboxCmdVBVACmdFlush(PVGASTATE pVGAState)
3347 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3352 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3355 void vboxCmdVBVACmdTimer(PVGASTATE pVGAState)
3357 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3359 vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3362 bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState)
3364 return VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva);
3385 PVGASTATE pVGAState = pVdma->pVGAState;
3391 rc = vboxVDMACrCtlPost(pVGAState, pCmd, sizeof (*pCmd));
3423 PVGASTATE pVGAState = pVdma->pVGAState;
3429 rc = vboxVDMACrCtlPost(pVGAState, pCmd, sizeof (*pCmd));
3458 PVGASTATE pVGAState = pVdma->pVGAState;
3459 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;