Cross Reference: /vbox/src/VBox/Devices/Graphics/DevVGA

Lines Matching defs:CmdVbva
385     LogRel(("CmdVbva: cross-bound writes unsupported\n"));
807     VBVAEXHOSTCONTEXT CmdVbva;
1162         VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1166         VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pVdma->pCurRemainingHostCtl, prevCmdRc);
1169     pVdma->pCurRemainingHostCtl = VBoxVBVAExHPCheckHostCtlOnDisable(&pVdma->CmdVbva);
1183     Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
1219         Assert(!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1223     Assert(VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1231     if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1252     int rc = VBoxVBVAExHSEnable(&pVdma->CmdVbva, pVBVA);
1280         VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1290     if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1335             if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1376             int rc = VBoxVBVAExHSSaveState(&pVdma->CmdVbva, pu8VramBase, pCmd->u.state.pSSM);
1389             int rc = VBoxVBVAExHSLoadState(&pVdma->CmdVbva, pu8VramBase, pCmd->u.state.pSSM, pCmd->u.state.u32Version);
1536             if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1545             if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1597                 rc = VBoxVBVAExHPPause(&pVdma->CmdVbva);
2554     VBVAEXHOSTCONTEXT *pCmdVbva = &pVdma->CmdVbva;
2710             rc = VBoxVBVAExHSInit(&pVdma->CmdVbva);
2725                 VBoxVBVAExHSTerm(&pVdma->CmdVbva);
2763     VBoxVBVAExHSTerm(&pVdma->CmdVbva);
2834     int rc = VBoxVBVAExHCtlSubmit(&pVdma->CmdVbva, pCtl, enmSource, pfnComplete, pvComplete);
2864     VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, enmType);
2876         VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
2975             if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
2986     VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pHCtl, rc);
2992     VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, fPaused ? VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED : VBVAEXHOSTCTL_TYPE_GHH_ENABLE);
3006         VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3057     if (VBoxVBVAExHSIsDisabled(&pVdma->CmdVbva))
3063     pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_GHH_DISABLE);
3077     VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3160     int rc = VBoxVBVAExHSCheckCommands(&pVdma->CmdVbva);
3335     if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3347     if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3357     if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3364     return VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva);
3449     if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3461     rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t*)pVdma->CmdVbva.pVBVA) - pu8VramBase));
3484         Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_ESTATE_PAUSED);
3509     if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3514     VBVAEXHOSTCTL* pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_HH_LOADSTATE_DONE);
3530         VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);