Lines Matching refs:vram_size

76             AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
83 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS)
92 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
101 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
313 AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size));
328 AssertMsg(offVRAM < pThis->vram_size, ("offVRAM = %p, pThis->vram_size = %p\n", offVRAM, pThis->vram_size));
341 Assert(offVRAMStart < pThis->vram_size);
342 Assert(offVRAMEnd <= pThis->vram_size);
926 uint32_t cVirtHeight = pThis->vram_size / cbLinePitch;
937 pThis->vbe_line_offset = RT_MIN(cbLinePitch, pThis->vram_size);
938 pThis->vbe_start_addr = RT_MIN(offStart, pThis->vram_size);
1054 || cb > pThis->vram_size)
1056 AssertMsgFailed(("VIRT WIDTH=%d YRES=%d cb=%d vram_size=%d\n",
1057 pThis->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH], pThis->vbe_regs[VBE_DISPI_INDEX_YRES], cb, pThis->vram_size));
1162 pThis->pDrv->pfnProcessAdapterData(pThis->pDrv, pThis->CTX_SUFF(vram_ptr), pThis->vram_size);
2052 if (pThis->start_addr * 4 + pThis->line_offset * cy < pThis->vram_size)
2705 pThis->vbe_bank_max = (pThis->vram_size >> 16) - 1;
2923 *pu32 = pThis->vram_size;
3630 *pu32 = pThis->vram_size / _64K;
3958 if (pThis->vram_size < LOGO_MAX_SIZE)
3961 if (pThis->vram_size >= LOGO_MAX_SIZE * 2)
3994 if (pThis->vram_size >= LOGO_MAX_SIZE * 2)
4195 if ((uintptr_t)(pbSrcOuter + cbLine - pThis->CTX_SUFF(vram_ptr)) > pThis->vram_size) {
4756 if (cbRequired && cbRequired <= pThis->vram_size)
5352 GCPhysAddress, GCPhysAddress + (pThis->vram_size - 1),
5406 SSMR3PutU32(pSSM, pThis->vram_size);
5509 if (pThis->vram_size != cbVRam)
5510 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("VRAM size changed: config=%#x state=%#x"), pThis->vram_size, cbVRam);
5627 if (pThis->vram_ptrR3 && pThis->vram_size)
5628 memset(pThis->vram_ptrR3, 0, pThis->vram_size);
5658 pThis->vbe_bank_max = (pThis->vram_size >> 16) - 1;
5892 maxPage = pThis->vram_size / (pMode->info.YResolution * bpl) - 1;
5982 rc = CFGMR3QueryU32Def(pCfg, "VRamSize", &pThis->vram_size, VGA_VRAM_DEFAULT);
5984 if (pThis->vram_size > VGA_VRAM_MAX)
5986 "VRamSize is too large, %#x, max %#x", pThis->vram_size, VGA_VRAM_MAX);
5987 if (pThis->vram_size < VGA_VRAM_MIN)
5989 "VRamSize is too small, %#x, max %#x", pThis->vram_size, VGA_VRAM_MIN);
5990 if (pThis->vram_size & (_256K - 1)) /* Make sure there are no partial banks even in planar modes. */
5992 "VRamSize is not a multiple of 256K (%#x)", pThis->vram_size);
6002 Log(("VGA: VRamSize=%#x fGCenabled=%RTbool fR0Enabled=%RTbool\n", pThis->vram_size, pThis->fGCEnabled, pThis->fR0Enabled));
6119 rc = PDMDevHlpMMIO2Register(pDevIns, iPCIRegionVRAM, pThis->vram_size, 0, (void **)&pThis->vram_ptrR3, "VRam");
6120 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMMIO2Register(%#x,) -> %Rrc\n", pThis->vram_size, rc), rc);
6411 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1 /* iRegion */, pThis->vram_size, PCI_ADDRESS_SPACE_MEM /* PCI_ADDRESS_SPACE_MEM_PREFETCH */, vgaR3IORegionMap);
6420 rc = PDMDevHlpPCIIORegionRegister(pDevIns, iPCIRegionVRAM, pThis->vram_size, PCI_ADDRESS_SPACE_MEM_PREFETCH, vgaR3IORegionMap);
6500 if (reqSize >= pThis->vram_size)
6534 if (reqSize >= pThis->vram_size)
6577 if (cy * cbPitch >= pThis->vram_size)
6580 cx, cy, cBits, pThis->vram_size / _1M));
6769 if (pThis->vram_size < LOGO_MAX_SIZE)