Cross Reference: /vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c

Lines Matching defs:StartAddress
1283   Reads the range of PCI configuration registers specified by StartAddress and
1287   from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1291   If any reserved bits in StartAddress are set, then ASSERT().
1292   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1295   @param  StartAddress  The starting address that encodes the PCI Segment, Bus, Device,
1306   IN  UINT64                   StartAddress,
1313   ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
1314   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
1327   if ((StartAddress & BIT0) != 0) {
1329     // Read a byte if StartAddress is byte aligned
1331     *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
1332     StartAddress += sizeof (UINT8);
1337   if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
1339     // Read a word if StartAddress is word aligned
1341     WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
1342     StartAddress += sizeof (UINT16);
1351     WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress));
1352     StartAddress += sizeof (UINT32);
1361     WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
1362     StartAddress += sizeof (UINT16);
1371     *(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
1381   Writes the range of PCI configuration registers specified by StartAddress and
1385   write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1389   If any reserved bits in StartAddress are set, then ASSERT().
1390   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1393   @param  StartAddress  The starting address that encodes the PCI Segment, Bus, Device,
1404   IN UINT64                    StartAddress,
1411   ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
1412   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
1425   if ((StartAddress & BIT0) != 0) {
1427     // Write a byte if StartAddress is byte aligned
1429     PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);
1430     StartAddress += sizeof (UINT8);
1435   if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
1437     // Write a word if StartAddress is word aligned
1439     PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
1440     StartAddress += sizeof (UINT16);
1449     PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer));
1450     StartAddress += sizeof (UINT32);
1459     PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
1460     StartAddress += sizeof (UINT16);
1469     PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);