Lines Matching refs:This

4   This code abstracts the DXE core from processor implementation details.
7 This program and the accompanying materials
49 occurred on the processor.This parameter is processor architecture specific.
64 This function flushes the range of addresses from Start to Start+Length
74 @param This The EFI_CPU_ARCH_PROTOCOL instance.
77 @param Length The number of bytes to flush from the processor's data cache. This
93 IN EFI_CPU_ARCH_PROTOCOL *This,
101 This function enables interrupt processing by the processor.
103 @param This The EFI_CPU_ARCH_PROTOCOL instance.
112 IN EFI_CPU_ARCH_PROTOCOL *This
117 This function disables interrupt processing by the processor.
119 @param This The EFI_CPU_ARCH_PROTOCOL instance.
128 IN EFI_CPU_ARCH_PROTOCOL *This
133 This function retrieves the processor's current interrupt state a returns it in
137 @param This The EFI_CPU_ARCH_PROTOCOL instance.
148 IN EFI_CPU_ARCH_PROTOCOL *This,
154 This function generates an INIT on the processor. If this function succeeds, then the
160 @param This The EFI_CPU_ARCH_PROTOCOL instance.
163 @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
172 IN EFI_CPU_ARCH_PROTOCOL *This,
178 This function registers and enables the handler specified by InterruptHandler for a processor
183 @param This The EFI_CPU_ARCH_PROTOCOL instance.
201 IN EFI_CPU_ARCH_PROTOCOL *This,
208 This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
210 @param This The EFI_CPU_ARCH_PROTOCOL instance.
211 @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
216 returned. This parameter is optional and may be NULL.
227 IN EFI_CPU_ARCH_PROTOCOL *This,
235 This function modifies the attributes for the memory region specified by BaseAddress and
238 @param This The EFI_CPU_ARCH_PROTOCOL instance.
260 IN EFI_CPU_ARCH_PROTOCOL *This,
269 /// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt
290 /// This is typically the size of the largest data cache line in the platform.