Lines Matching refs:mov
40 (p6) mov r33=32;;
167 mov r8=1 // r8 = success
168 mov r2=cr.iva;;
177 mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
183 mov out2=PATCH_CODE_SIZE;;
192 mov out2=1;; // out2 = copy 1 bundle
199 mov out2=out0;; // out2 = IP address of new location
206 mov out2=1;; // out2 = copy 1 bundle
212 mov out2=1;; // out2 = copy 1 bundle
243 mov r8=1 // r8 = success
244 mov r2=cr.iva;; // r2 = interrupt vector address
249 mov out2=1;; // out2 = copy 1 bundle
255 mov out2=out0;; // out2 = IP address of new location
261 mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
344 mov loc2=SLOT0 // loc2 = slot index
345 mov loc5=in0;; // loc5 = runtime address of bundle
346 mov in0=1;; // in0 = success
353 mov out0=loc5;; // out0 = runtime address of bundle
355 mov loc3=out0;; // loc3 = instruction template
356 mov out0=loc5 // out0 = runtime address of bundle
357 mov out1=loc2;; // out1 = instruction slot number
359 mov loc4=out0;; // loc4 = instruction encoding
360 mov out0=loc4 // out0 = instuction encoding
361 mov out1=loc2 // out1 = instruction slot number
362 mov out2=loc3;; // out2 = instruction template
367 mov out0=loc4 // out0 = instuction encoding
368 mov out1=in1 // out1 = IP address of previous location
369 mov out2=in2;; // out2 = IP address of new location
372 (p15) mov in0=0 // in0 = failure
374 mov out2=out0;; // out2 = instruction encoding
375 mov out0=loc5 // out0 = runtime address of bundle
376 mov out1=loc2;; // out1 = instruction slot number
416 (p15) mov in1=1 // Instruction did not need to be reencoded
428 (p15) mov loc5=loc4;;
439 mov in1=1;; // in1 = success
443 mov in1=0;; // in1 = failure
479 mov in0=1;; // in0 = 1 which destroys the instruction
481 mov in0=0;; // in0 = not a branch
499 mov in0=1;; // in0 = branch
533 mov in0=loc2;; // in0 = template, right justified
672 mov r8=cr2;;
693 mov loc0=psr
694 mov loc1=0x6000;;
699 mov psr.l=loc0;; // write new psr
732 mov loc2=ar.unat;; // save application context unat (spilled later)
733 mov ar.unat=r0;; // set UNAT=0
766 mov loc3=ar.unat;; // save debugger context unat (spilled later)
797 mov loc0=pr;; // save predicates
800 mov loc0=b1;;
802 mov loc0=b2;;
804 mov loc0=b3;;
806 mov loc0=b4;;
808 mov loc0=b5;;
810 mov loc0=b6;;
812 mov loc0=b7;;
814 mov loc0=ar.rsc;; // save ar.rsc
819 mov loc0=ar.fcr;; // save ar.fcr (ar21 - IA32 floating-point control register)
821 mov loc0=ar.eflag;; // save ar.eflag (ar24)
823 mov loc0=ar.csd;; // save ar.csd (ar25 - ia32 CS descriptor)
825 mov loc0=ar.ssd;; // save ar.ssd (ar26 - ia32 ss descriptor)
827 mov loc0=ar.cflg;; // save ar.cflg (ar27 - ia32 cr0 and cr4)
829 mov loc0=ar.fsr;; // save ar.fsr (ar28 - ia32 floating-point status register)
831 mov loc0=ar.fir;; // save ar.fir (ar29 - ia32 floating-point instruction register)
833 mov loc0=ar.fdr;; // save ar.fdr (ar30 - ia32 floating-point data register)
835 mov loc0=ar.ccv;; // save ar.ccv
838 mov loc0=ar.fpsr;; // save floating point status register
841 mov loc0=ar.lc;; // save ar.lc
843 mov loc0=ar.ec;; // save ar.ec
847 mov loc0=cr.dcr;; // save dcr
849 mov loc0=cr.itm;; // save itm
851 mov loc0=cr.iva;; // save iva
853 mov loc0=cr.pta;; // save pta
855 mov loc0=cr.ipsr;; // save ipsr
857 mov loc0=cr.isr;; // save isr
859 mov loc0=cr.iip;; // save iip
861 mov loc0=cr.ifa;; // save ifa
863 mov loc0=cr.itir;; // save itir
865 mov loc0=cr.iipa;; // save iipa
867 mov loc0=cr.ifs;; // save ifs
869 mov loc0=cr.iim;; // save iim
871 mov loc0=cr.iha;; // save iha
875 mov loc0=dbr[r0];; // save dbr0 - dbr7
878 mov loc0=dbr[loc1];;
881 mov loc0=dbr[loc1];;
884 mov loc0=dbr[loc1];;
887 mov loc0=dbr[loc1];;
890 mov loc0=dbr[loc1];;
893 mov loc0=dbr[loc1];;
896 mov loc0=dbr[loc1];;
898 mov loc0=ibr[r0];; // save ibr0 - ibr7
901 mov loc0=ibr[loc1];;
904 mov loc0=ibr[loc1];;
907 mov loc0=ibr[loc1];;
910 mov loc0=ibr[loc1];;
913 mov loc0=ibr[loc1];;
916 mov loc0=ibr[loc1];;
919 mov loc0=ibr[loc1];;
956 mov ibr[loc1]=loc0;;
959 mov ibr[loc1]=loc0;;
962 mov ibr[loc1]=loc0;;
965 mov ibr[loc1]=loc0;;
968 mov ibr[loc1]=loc0;;
971 mov ibr[loc1]=loc0;;
974 mov ibr[loc1]=loc0;;
976 mov ibr[r0]=loc0;;
979 mov dbr[loc1]=loc0;;
982 mov dbr[loc1]=loc0;;
985 mov dbr[loc1]=loc0;;
988 mov dbr[loc1]=loc0;;
991 mov dbr[loc1]=loc0;;
994 mov dbr[loc1]=loc0;;
997 mov dbr[loc1]=loc0;;
999 mov dbr[r0]=loc0;;
1001 mov cr.iha=loc0;;
1003 mov cr.iim=loc0;;
1005 mov cr.ifs=loc0;;
1007 mov cr.iipa=loc0;;
1009 mov cr.itir=loc0;;
1011 mov cr.ifa=loc0;;
1013 mov cr.iip=loc0;;
1015 mov cr.isr=loc0;;
1017 mov cr.ipsr=loc0;;
1019 mov cr.pta=loc0;;
1021 mov cr.iva=loc0;;
1023 mov cr.itm=loc0;;
1025 mov cr.dcr=loc0;;
1027 mov ar.ec=loc0;;
1029 mov ar.lc=loc0;;
1032 mov ar.fpsr=loc0;;
1035 mov ar.ccv=loc0;;
1037 mov ar.fdr=loc0;;
1039 mov ar.fir=loc0;;
1041 mov ar.fsr=loc0;;
1043 mov ar.cflg=loc0;;
1045 mov ar.ssd=loc0;;
1047 mov ar.csd=loc0;;
1049 mov ar.eflag=loc0;;
1051 mov ar.fcr=loc0;;
1056 mov ar.rsc=loc0;;
1058 mov b7=loc0;;
1060 mov b6=loc0;;
1062 mov b5=loc0;;
1064 mov b4=loc0;;
1066 mov b3=loc0;;
1068 mov b2=loc0;;
1070 mov b1=loc0;;
1073 mov pr=loc0;;
1104 mov ar.unat=loc3;; // restore unat (int_nat) before fill of general registers
1136 mov ar.unat=loc2;; // restore application context unat
1170 mov SCRATCH_REG2=ar.bsp // save interrupted context bsp
1171 mov SCRATCH_REG3=ar.bspstore // save interrupted context bspstore
1172 mov SCRATCH_REG4=ar.rnat // save interrupted context rnat
1173 mov SCRATCH_REG6=cr.ifs;; // save IFS in case we need to chain...
1179 mov out1=B0_REG // out1 = Original B0
1180 mov out2=SCRATCH_REG2 // out2 = original ar.bsp
1181 mov out3=SCRATCH_REG3 // out3 = original ar.bspstore
1182 mov out4=SCRATCH_REG4 // out4 = original ar.rnat
1183 mov out5=SCRATCH_REG5 // out5 = original ar.pfs
1184 mov loc2=SCRATCH_REG1;; // loc2 = vector number + chain flag
1194 mov out0=loc3;; // Context record base in out0
1199 mov loc4=out0 // save modified address
1206 mov b6=loc1;; // put it in a branch register
1209 mov loc1=0xfffff;; // mask off so only vector bits are present
1211 mov out1=loc3;; // pass context record address
1216 mov out0=loc4;; // pass address of last element in context record
1218 mov b0=out1 // fill in b0
1219 mov ar.rnat=out4
1220 mov ar.pfs=out5
1227 mov loc0=ar.rsc // get RSC value
1228 mov loc1=ar.rsc // save it so we can restore it
1231 mov ar.rsc=loc0;; // modify RSC
1233 mov ar.rsc=loc1;; // restore original RSC
1237 mov PR_REG=pr // save predicates - to be restored after chaining decision
1238 mov B0_REG=b0 // save b0 - required by chain code
1239 mov loc2=EXCPT_EXTERNAL_INTERRUPT;;
1244 mov pr=PR_REG;;
1248 mov pr=PR_REG
1249 mov SCRATCH_REG1=cr.iva
1250 mov SCRATCH_REG2=PATCH_RETURN_OFFSET;;
1252 mov b0=SCRATCH_REG1;;
1279 mov B0_REG=b0
1281 mov b0=SCRATCH_REG1;;
1282 mov SCRATCH_REG1=0;;// immediate value is fixed up during install of handler to be the vector number
1294 mov SCRATCH_REG0=psr
1295 mov SCRATCH_REG6=cr.ipsr
1296 mov PR_REG=pr
1297 mov B0_REG=b0;;
1302 mov psr.l = SCRATCH_REG1;;
1321 (p15) mov SCRATCH_REG2=0;; // Yes? Then reset
1326 mov pr=PR_REG
1328 mov b0=SCRATCH_REG1;; // b0 = entrypoint of HookHandler
1329 mov SCRATCH_REG1=EXCPT_EXTERNAL_INTERRUPT;;
1339 mov SCRATCH_REG5=cr.ipsr
1340 mov SCRATCH_REG4=cr.iip;;
1341 mov cr.ipsr=SCRATCH_REG0
1342 mov SCRATCH_REG1=ip;;
1344 mov cr.iip=SCRATCH_REG1;;
1348 mov cr.ifs=SCRATCH_REG6
1349 mov cr.ipsr=SCRATCH_REG5
1350 mov cr.iip=SCRATCH_REG4;;
1353 mov pr=PR_REG // pr = saved predicate registers
1354 mov b0=B0_REG;; // b0 = saved b0