Lines Matching defs:pReq

928 PCIRAWR0DECL(int) PciRawR0ProcessReq(PSUPDRVSESSION pSession, PVM pVM, PPCIRAWSENDREQ pReq)
930 LogFlow(("PciRawR0ProcessReq: %d for %x\n", pReq->iRequest, pReq->TargetDevice));
934 switch (pReq->iRequest)
938 pReq->u.aOpenDevice.PciAddress,
939 pReq->u.aOpenDevice.fFlags,
940 &pReq->u.aOpenDevice.Device,
941 &pReq->u.aOpenDevice.fDevFlags);
945 pReq->TargetDevice,
946 pReq->u.aCloseDevice.fFlags);
950 pReq->TargetDevice,
951 pReq->u.aGetRegionInfo.iRegion,
952 &pReq->u.aGetRegionInfo.RegionStart,
953 &pReq->u.aGetRegionInfo.u64RegionSize,
954 &pReq->u.aGetRegionInfo.fPresent,
955 &pReq->u.aGetRegionInfo.fFlags);
959 pReq->TargetDevice,
960 pReq->u.aMapRegion.iRegion,
961 pReq->u.aMapRegion.StartAddress,
962 pReq->u.aMapRegion.iRegionSize,
963 pReq->u.aMapRegion.fFlags,
964 &pReq->u.aMapRegion.pvAddressR3,
965 &pReq->u.aMapRegion.pvAddressR0);
969 pReq->TargetDevice,
970 pReq->u.aUnmapRegion.iRegion,
971 pReq->u.aUnmapRegion.StartAddress,
972 pReq->u.aUnmapRegion.iRegionSize,
973 pReq->u.aUnmapRegion.pvAddressR3,
974 pReq->u.aUnmapRegion.pvAddressR0);
978 pReq->TargetDevice,
979 pReq->u.aPioWrite.iPort,
980 pReq->u.aPioWrite.iValue,
981 pReq->u.aPioWrite.cb);
985 pReq->TargetDevice,
986 pReq->u.aPioRead.iPort,
987 &pReq->u.aPioWrite.iValue,
988 pReq->u.aPioRead.cb);
992 pReq->TargetDevice,
993 pReq->u.aMmioWrite.Address,
994 &pReq->u.aMmioWrite.Value);
998 pReq->TargetDevice,
999 pReq->u.aMmioRead.Address,
1000 &pReq->u.aMmioRead.Value);
1004 pReq->TargetDevice,
1005 pReq->u.aPciCfgWrite.iOffset,
1006 &pReq->u.aPciCfgWrite.Value);
1010 pReq->TargetDevice,
1011 pReq->u.aPciCfgRead.iOffset,
1012 &pReq->u.aPciCfgRead.Value);
1016 pReq->TargetDevice);
1020 pReq->TargetDevice);
1024 pReq->TargetDevice,
1025 pReq->u.aGetIrq.iTimeout,
1026 &pReq->u.aGetIrq.iIrq);
1030 pReq->TargetDevice,
1031 (PCIRAWPOWERSTATE)pReq->u.aPowerStateChange.iState,
1032 &pReq->u.aPowerStateChange.u64Param);