Lines Matching refs:pDev
28 DECLINLINE(uint16_t) msiGetMessageControl(PPCIDEVICE pDev)
30 return PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL);
33 DECLINLINE(bool) msiIs64Bit(PPCIDEVICE pDev)
35 return pciDevIsMsi64Capable(pDev);
38 DECLINLINE(uint32_t*) msiGetMaskBits(PPCIDEVICE pDev)
40 uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MASK_BITS_64 : VBOX_MSI_CAP_MASK_BITS_32;
41 iOff += pDev->Int.s.u8MsiCapOffset;
42 return (uint32_t*)(pDev->config + iOff);
45 DECLINLINE(uint32_t*) msiGetPendingBits(PPCIDEVICE pDev)
47 uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_PENDING_BITS_64 : VBOX_MSI_CAP_PENDING_BITS_32;
48 iOff += pDev->Int.s.u8MsiCapOffset;
49 return (uint32_t*)(pDev->config + iOff);
52 DECLINLINE(bool) msiIsEnabled(PPCIDEVICE pDev)
54 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_ENABLE) != 0;
57 DECLINLINE(uint8_t) msiGetMme(PPCIDEVICE pDev)
59 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_QSIZE) >> 4;
62 DECLINLINE(RTGCPHYS) msiGetMsiAddress(PPCIDEVICE pDev)
64 if (msiIs64Bit(pDev))
66 uint32_t lo = PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_LO);
67 uint32_t hi = PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_HI);
72 return PCIDevGetDWord(pDev, pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_ADDRESS_32);
76 DECLINLINE(uint32_t) msiGetMsiData(PPCIDEVICE pDev, int32_t iVector)
78 int16_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MESSAGE_DATA_64 : VBOX_MSI_CAP_MESSAGE_DATA_32;
79 uint16_t lo = PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + iOff);
82 uint8_t bits = msiGetMme(pDev);
105 void MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev,
108 int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
109 Assert(iOff >= 0 && (pciDevIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
114 bool f64Bit = msiIs64Bit(pDev);
128 pDev->config[uAddr] = u8Val | (pDev->config[uAddr] & UINT8_C(0x8e));
134 if (pDev->config[uAddr] != u8Val)
155 if (maskUpdated != -1 && msiIsEnabled(pDev))
157 uint32_t* puPending = msiGetPendingBits(pDev);
163 if (msiBitJustCleared(pDev->config[uAddr], u8Val, iBit))
168 pDev->config[uAddr] &= ~iBit;
172 MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH, 0 /*uTagSrc*/);
175 if (msiBitJustSet(pDev->config[uAddr], u8Val, iBit))
182 pDev->config[uAddr] = u8Val;
190 uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len)
192 int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
194 Assert(iOff >= 0 && (pciDevIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
200 rv = PCIDevGetByte(pDev, u32Address);
203 rv = PCIDevGetWord(pDev, u32Address);
206 rv = PCIDevGetDWord(pDev, u32Address);
217 int MsiInit(PPCIDEVICE pDev, PPDMMSIREG pMsiReg)
223 Assert(!pciDevIsPassthrough(pDev));
251 pDev->Int.s.u8MsiCapOffset = iCapOffset;
252 pDev->Int.s.u8MsiCapSize = f64bit ? VBOX_MSI_CAP_SIZE_64 : VBOX_MSI_CAP_SIZE_32;
254 PCIDevSetByte(pDev, iCapOffset + 0, VBOX_PCI_CAP_ID_MSI);
255 PCIDevSetByte(pDev, iCapOffset + 1, iNextOffset); /* next */
256 PCIDevSetWord(pDev, iCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL, iFlags);
258 *msiGetMaskBits(pDev) = 0;
259 *msiGetPendingBits(pDev) = 0;
261 pciDevSetMsiCapable(pDev);
269 bool MsiIsEnabled(PPCIDEVICE pDev)
271 return pciDevIsMsiCapable(pDev) && msiIsEnabled(pDev);
274 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc)
276 AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that"));
278 uint32_t uMask = *msiGetMaskBits(pDev);
279 uint32_t* puPending = msiGetPendingBits(pDev);
301 RTGCPHYS GCAddr = msiGetMsiAddress(pDev);
302 uint32_t u32Value = msiGetMsiData(pDev, iVector);