Cross Reference: /vbox/src/VBox/Devices/Bus/DevPciIch9.cpp

Lines Matching refs:iRegion
808 DECLINLINE(uint32_t) ich9pciGetRegionReg(int iRegion)
810     return (iRegion == VBOX_PCI_ROM_SLOT) ?
811             VBOX_PCI_ROM_ADDRESS : (VBOX_PCI_BASE_ADDRESS_0 + iRegion * 4);
816 static int  ich9pciUnmapRegion(PPCIDEVICE pDev, int iRegion)
818     PCIIORegion* pRegion = &pDev->Int.s.aIORegions[iRegion];
838                 rc = pRegion->map_func(pDev, iRegion, NIL_RTGCPHYS, pRegion->size, (PCIADDRESSSPACE)(pRegion->type));
840                 rc = PDMDevHlpMMIO2Unmap(pDev->pDevIns, iRegion, GCPhysBase);
857     for (int iRegion = 0; iRegion < PCI_NUM_REGIONS; iRegion++)
859         PCIIORegion* pRegion = &pDev->Int.s.aIORegions[iRegion];
860         uint32_t uConfigReg  = ich9pciGetRegionReg(iRegion);
903                 if (iRegion == PCI_ROM_SLOT && !(uNew & 1))
923                 ich9pciUnmapRegion(pDev, iRegion);
930                 rc = pRegion->map_func(pDev, iRegion,
1001 static DECLCALLBACK(int) ich9pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1016     AssertMsgReturn((unsigned)iRegion < PCI_NUM_REGIONS,
1017                     ("Invalid iRegion=%d PCI_NUM_REGIONS=%d\n", iRegion, PCI_NUM_REGIONS),
1026          pPciDev->name, iRegion, cbRegion, enmType));
1029     Assert(pPciDev->Int.s.aIORegions[iRegion].type != 0xff);
1034     PPCIIOREGION pRegion = &pPciDev->Int.s.aIORegions[iRegion];
1042         AssertMsgReturn(iRegion  < 4,
1043                         ("Region %d cannot be 64-bit\n", iRegion),
1046         pPciDev->Int.s.aIORegions[iRegion+1].type = 0xff;
1051     PCIDevSetDWord(pPciDev, ich9pciGetRegionReg(iRegion), u32Value);
1608 static void ich9pciSetRegionAddress(PICH9PCIGLOBALS pGlobals, uint8_t uBus, uint8_t uDevFn, int iRegion, uint64_t addr)
1610     uint32_t uReg = ich9pciGetRegionReg(iRegion);
1620     if ( iRegion == PCI_ROM_SLOT )
1757             for (int iRegion = 0; iRegion < (PCI_NUM_REGIONS-1); iRegion++)
1759                 uint32_t u32Address = ich9pciGetRegionReg(iRegion);
1780                     AssertMsg((u8ResourceType & PCI_COMMAND_IOACCESS) == 0, ("type=%#x rgn=%d\n", u8ResourceType, iRegion));
1809                 Log2(("%s: Size of region %u for device %d on bus %d is %lld\n", __FUNCTION__, iRegion, uDevFn, uBus, cbRegSize64));
1816                     Log(("%s: Start address of %s region %u is %#x\n", __FUNCTION__, (fIsPio ? "I/O" : "MMIO"), iRegion, *paddr));
1817                     ich9pciSetRegionAddress(pGlobals, uBus, uDevFn, iRegion, *paddr);
1822                         iRegion++; /* skip next region */
1992 DECLINLINE(void) ich9pciWriteBarByte(PCIDevice *aDev, int iRegion, int iOffset, uint8_t u8Val)
1994     PCIIORegion * pRegion = &aDev->Int.s.aIORegions[iRegion];
1998          iRegion, iOffset, u8Val, iRegionSize));
2006         ich9pciWriteBarByte(aDev, iRegion-1, iOffset+4, u8Val);
2014     uint32_t uAddr = ich9pciGetRegionReg(iRegion) + iOffset;
2180                     int iRegion = fRom ? VBOX_PCI_ROM_SLOT : (addr - VBOX_PCI_BASE_ADDRESS_0) >> 2;
2182                     ich9pciWriteBarByte(aDev, iRegion, iOffset, u8Val);
2386                 for (int iRegion = 0; iRegion < PCI_NUM_REGIONS; iRegion++)
2388                     PCIIORegion* pRegion = &pPciDev->Int.s.aIORegions[iRegion];
2394                     uint32_t u32Addr = ich9pciGetDWord(pPciDev, ich9pciGetRegionReg(iRegion));
2415                                     pszDesc, iRegion, u32Addr, u32Addr+iRegionSize);
2417                         iRegion++;
2677     for (int iRegion = 0; iRegion < PCI_NUM_REGIONS; iRegion++)
2679         PCIIORegion* pRegion = &pDev->Int.s.aIORegions[iRegion];
2683         ich9pciUnmapRegion(pDev, iRegion);