Lines Matching refs:PciBusReg
2560 PDMPCIBUSREG PciBusReg;
2561 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION;
2562 PciBusReg.pfnRegisterR3 = ich9pciRegister;
2563 PciBusReg.pfnRegisterMsiR3 = ich9pciRegisterMsi;
2564 PciBusReg.pfnIORegionRegisterR3 = ich9pciIORegionRegister;
2565 PciBusReg.pfnSetConfigCallbacksR3 = ich9pciSetConfigCallbacks;
2566 PciBusReg.pfnSetIrqR3 = ich9pciSetIrq;
2567 PciBusReg.pfnFakePCIBIOSR3 = ich9pciFakePCIBIOS;
2568 PciBusReg.pszSetIrqRC = fGCEnabled ? "ich9pciSetIrq" : NULL;
2569 PciBusReg.pszSetIrqR0 = fR0Enabled ? "ich9pciSetIrq" : NULL;
2570 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
2816 PDMPCIBUSREG PciBusReg;
2817 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION;
2818 PciBusReg.pfnRegisterR3 = ich9pcibridgeRegister;
2819 PciBusReg.pfnRegisterMsiR3 = ich9pciRegisterMsi;
2820 PciBusReg.pfnIORegionRegisterR3 = ich9pciIORegionRegister;
2821 PciBusReg.pfnSetConfigCallbacksR3 = ich9pciSetConfigCallbacks;
2822 PciBusReg.pfnSetIrqR3 = ich9pcibridgeSetIrq;
2823 PciBusReg.pfnFakePCIBIOSR3 = NULL; /* Only needed for the first bus. */
2824 PciBusReg.pszSetIrqRC = fGCEnabled ? "ich9pcibridgeSetIrq" : NULL;
2825 PciBusReg.pszSetIrqR0 = fR0Enabled ? "ich9pcibridgeSetIrq" : NULL;
2826 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);