Lines Matching refs:PciBusReg
2146 PDMPCIBUSREG PciBusReg;
2148 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION;
2149 PciBusReg.pfnRegisterR3 = pciR3Register;
2150 PciBusReg.pfnRegisterMsiR3 = NULL;
2151 PciBusReg.pfnIORegionRegisterR3 = pciR3CommonIORegionRegister;
2152 PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks;
2153 PciBusReg.pfnSetIrqR3 = pciSetIrq;
2154 PciBusReg.pfnFakePCIBIOSR3 = pciR3FakePCIBIOS;
2155 PciBusReg.pszSetIrqRC = fGCEnabled ? "pciSetIrq" : NULL;
2156 PciBusReg.pszSetIrqR0 = fR0Enabled ? "pciSetIrq" : NULL;
2157 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
2523 PDMPCIBUSREG PciBusReg;
2524 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION;
2525 PciBusReg.pfnRegisterR3 = pcibridgeR3RegisterDevice;
2526 PciBusReg.pfnRegisterMsiR3 = NULL;
2527 PciBusReg.pfnIORegionRegisterR3 = pciR3CommonIORegionRegister;
2528 PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks;
2529 PciBusReg.pfnSetIrqR3 = pcibridgeSetIrq;
2530 PciBusReg.pfnFakePCIBIOSR3 = NULL; /* Only needed for the first bus. */
2531 PciBusReg.pszSetIrqRC = fGCEnabled ? "pcibridgeSetIrq" : NULL;
2532 PciBusReg.pszSetIrqR0 = fR0Enabled ? "pcibridgeSetIrq" : NULL;
2533 rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);