Cross Reference: /vbox/src/VBox/Devices/Bus/DevPCI.cpp

Lines Matching defs:address
135     /** The next I/O port address which the PCI BIOS will use. */
137     /** The next MMIO address which the PCI BIOS will use. */
340 static DECLCALLBACK(uint32_t) pci_default_read_config(PCIDevice *d, uint32_t address, unsigned len)
345         val = d->config[address];
348         val = RT_LE2H_U16(*(uint16_t *)(d->config + address));
352         val = RT_LE2H_U32(*(uint32_t *)(d->config + address));
358 static DECLCALLBACK(void) pci_default_write_config(PCIDevice *d, uint32_t address, uint32_t val, unsigned len)
364     if (len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) ||
365                      (address >= 0x30 && address < 0x34))) {
369         if ( address >= 0x30 ) {
372             reg = (address - 0x10) >> 2;
385         *(uint32_t *)(d->config + address) = RT_H2LE_U32(val);
391     addr = address;
474     end = address + len;
475     if (end > PCI_COMMAND && address < (PCI_COMMAND + 2)) {
896     /* Write address of the device. */
939                 /* VGA: map frame buffer to default Bochs VBE address */
992                 Log(("%s: Aligned I/O start address. New address %#x\n", __FUNCTION__, pGlobals->pci_bios_io_addr));
998                 Log(("%s: Aligned MMIO start address. New address %#x\n", __FUNCTION__, pGlobals->pci_bios_mem_addr));
1049                  * PCI_NUM_REGIONS is 7 because of the rom region but there are only 6 base address register defined by the PCI spec.
1086                         Log(("%s: Start address of %s region %u is %#x\n", __FUNCTION__, ((u8RessourceType & 0x01) == 1 ? "I/O" : "MMIO"), i, *paddr));
1089                         Log(("%s: New address is %#x\n", __FUNCTION__, *paddr));
1125  * @callback_method_impl{FNIOMIOPORTOUT, PCI address}
1145  * @callback_method_impl{FNIOMIOPORTIN, PCI address}