Lines Matching defs:irq

101     int irq;
164 int irq;
325 static int magic_of_irq(int irq)
327 switch (irq)
341 LogFlowFunc(("bad irq %d\n", irq));
361 LogFlowFunc(("bad irq magic %d\n", magic));
439 qemu_irq_raise (pThis->pic[pThis->irq]);
446 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 1);
876 qemu_irq_raise (pThis->pic[pThis->irq]);
878 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 1);
1053 qemu_irq_raise (pThis->pic[pThis->irq]);
1067 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 1);
1164 qemu_irq_lower (pThis->pic[pThis->irq]);
1166 qemu_irq_raise (pThis->pic[pThis->irq]);
1167 qemu_irq_lower (pThis->pic[pThis->irq]);
1170 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 0);
1173 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 1);
1174 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 0);
1215 qemu_irq_lower (pThis->pic[pThis->irq]);
1217 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 0);
1339 case 0x0e: /* data available status | irq 8 ack */
1346 qemu_irq_lower (pThis->pic[pThis->irq]);
1348 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 0);
1353 case 0x0f: /* irq 16 ack */
1360 qemu_irq_lower (pThis->pic[pThis->irq]);
1362 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 0);
1539 int irq = irq_of_magic(val);
1540 LogFlowFunc(("setting irq to %d (val=%#x)\n", irq, val));
1541 if (irq > 0)
1542 pThis->irq = irq;
1811 qemu_irq_raise (pThis->pic[pThis->irq]);
1813 PDMDevHlpISASetIrq(pThis->pDevIns, pThis->irq, 1);
1922 qemu_put_be32 (f, pThis->irq);
1983 pThis->irq=qemu_get_be32 (f);
2109 pThis->irq = conf.irq;
2115 pThis->mixer_regs[0x80] = magic_of_irq (pThis->irq);
2183 int32_t irq;
2184 SSMR3GetS32 (pSSM, &irq);
2195 if ( irq != pThis->irqCfg
2202 N_("config changed: irq=%x/%x dma=%x/%x hdma=%x/%x port=%x/%x ver=%x/%x (saved/config)"),
2203 irq, pThis->irqCfg,
2323 rc = CFGMR3QuerySIntDef(pCfgHandle, "IRQ", &pThis->irq, 5);
2327 pThis->irqCfg = pThis->irq;
2364 pThis->mixer_regs[0x80] = magic_of_irq (pThis->irq);