Lines Matching refs:CARD32
335 #define PCIGETMEMORY64HIGH(b) (*((CARD32*)&(b) + 1))
420 CARD32 device_vendor;
433 CARD32 status_command;
446 CARD32 class_revision;
463 CARD32 bist_header_latency_cache;
480 CARD32 cg_rsrvd1; /* 0x10 */
486 CARD32 cg_bus_reg;
499 CARD32 cg_bus_reg;
508 CARD32 mem_base0; /* 0x1c */
509 CARD32 mem_limit0; /* 0x20 */
510 CARD32 mem_base1; /* 0x24 */
511 CARD32 mem_limit1; /* 0x28 */
512 CARD32 io_base0; /* 0x2c */
513 CARD32 io_limit0; /* 0x30 */
514 CARD32 io_base1; /* 0x34 */
515 CARD32 io_limit1; /* 0x38 */
520 CARD32 dv_base0;
521 CARD32 dv_base1;
522 CARD32 dv_base2;
523 CARD32 dv_base3;
524 CARD32 dv_base4;
525 CARD32 dv_base5;
528 CARD32 bg_rsrvd[2];
531 CARD32 pp_bus_reg;
551 CARD32 pp_bus_reg;
573 CARD32 rsvd1;
574 CARD32 pftch_umem_base;
575 CARD32 cardbus_cis_ptr;
578 CARD32 subsys_card_vendor;
579 CARD32 pftch_umem_limit;
580 CARD32 rsvd2;
592 CARD32 baserom;
604 CARD32 rsvd3; /* Offset 0x34 - 0x37 */
605 CARD32 rsvd4; /* Offset 0x38 - 0x3b */
611 CARD32 max_min_ipin_iline;
639 CARD32 dwords[48];
646 CARD32 dwords[256/sizeof(CARD32)];
662 CARD32 listed_class;
758 PCITAG pciFindFirst(CARD32 id, CARD32 mask);
760 CARD32 pciReadLong(PCITAG tag, int offset);
763 void pciWriteLong(PCITAG tag, int offset, CARD32 val);
766 void pciSetBitsLong(PCITAG tag, int offset, CARD32 mask, CARD32 val);
772 CARD32 pciCheckForBrokenBase(PCITAG tag,int basereg);