Cross Reference: /vbox/include/VBox/vmm/patm.h

Lines Matching defs:pVM
138  * @param   pVM         The VM to operate on.
143 VMMDECL(bool)           PATMIsPatchGCAddr(PVM pVM, RTRCUINTPTR uGCAddr);
144 VMMDECL(bool)           PATMIsPatchGCAddrExclHelpers(PVM pVM, RTRCUINTPTR uGCAddr);
145 VMM_INT_DECL(int)       PATMReadPatchCode(PVM pVM, RTGCPTR GCPtrPatchCode, void *pvDst, size_t cbToRead, size_t *pcbRead);
147 VMM_INT_DECL(void)      PATMRawEnter(PVM pVM, PCPUMCTX pCtx);
148 VMM_INT_DECL(void)      PATMRawLeave(PVM pVM, PCPUMCTX pCtx, int rawRC);
149 VMM_INT_DECL(uint32_t)  PATMRawGetEFlags(PVM pVM, PCCPUMCTX pCtx);
150 VMM_INT_DECL(void)      PATMRawSetEFlags(PVM pVM, PCPUMCTX pCtx, uint32_t efl);
151 VMM_INT_DECL(RCPTRTYPE(PPATMGCSTATE)) PATMGetGCState(PVM pVM);
152 VMM_INT_DECL(bool)      PATMShouldUseRawMode(PVM pVM, RTRCPTR pAddrGC);
153 VMM_INT_DECL(int)       PATMSetMMIOPatchInfo(PVM pVM, RTGCPHYS GCPhys, RTRCPTR pCachedData);
155 VMM_INT_DECL(bool)      PATMIsInt3Patch(PVM pVM, RTRCPTR pInstrGC, uint32_t *pOpcode, uint32_t *pSize);
156 VMM_INT_DECL(bool)      PATMAreInterruptsEnabled(PVM pVM);
157 VMM_INT_DECL(bool)      PATMAreInterruptsEnabledByCtx(PVM pVM, PCPUMCTX pCtx);
159 VMM_INT_DECL(int)       PATMSysCall(PVM pVM, PCPUMCTX pCtx, PDISCPUSTATE pCpu);
167 VMMRC_INT_DECL(int)     PATMRCHandleInt3PatchTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
168 VMMRC_INT_DECL(int)     PATMRCHandleWriteToPatchPage(PVM pVM, PCPUMCTXCORE pRegFrame, RTRCPTR GCPtr, uint32_t cbWrite);
169 VMMRC_INT_DECL(int)     PATMRCHandleIllegalInstrTrap(PVM pVM, PCPUMCTXCORE pRegFrame);
183 VMMR3_INT_DECL(int)             PATMR3Init(PVM pVM);
184 VMMR3_INT_DECL(int)             PATMR3InitFinalize(PVM pVM);
185 VMMR3_INT_DECL(void)            PATMR3Relocate(PVM pVM, RTRCINTPTR offDelta);
186 VMMR3_INT_DECL(int)             PATMR3Term(PVM pVM);
187 VMMR3_INT_DECL(int)             PATMR3Reset(PVM pVM);
189 VMMR3_INT_DECL(bool)            PATMR3IsInsidePatchJump(PVM pVM, RTRCPTR pAddr, PRTGCPTR32 pPatchAddr);
190 VMMR3_INT_DECL(RTRCPTR)         PATMR3QueryPatchGCPtr(PVM pVM, RTRCPTR pAddrGC);
191 VMMR3_INT_DECL(void *)          PATMR3GCPtrToHCPtr(PVM pVM, RTRCPTR pAddrGC);
192 VMMR3_INT_DECL(PPATMGCSTATE)    PATMR3QueryGCStateHC(PVM pVM);
193 VMMR3_INT_DECL(int)             PATMR3HandleTrap(PVM pVM, PCPUMCTX pCtx, RTRCPTR pEip, RTGCPTR *ppNewEip);
194 VMMR3_INT_DECL(int)             PATMR3HandleMonitoredPage(PVM pVM);
195 VMMR3_INT_DECL(int)             PATMR3PatchWrite(PVM pVM, RTRCPTR GCPtr, uint32_t cbWrite);
196 VMMR3_INT_DECL(int)             PATMR3FlushPage(PVM pVM, RTRCPTR addr);
197 VMMR3_INT_DECL(int)             PATMR3InstallPatch(PVM pVM, RTRCPTR pInstrGC, uint64_t flags);
198 VMMR3_INT_DECL(int)             PATMR3AddHint(PVM pVM, RTRCPTR pInstrGC, uint32_t flags);
199 VMMR3_INT_DECL(int)             PATMR3DuplicateFunctionRequest(PVM pVM, PCPUMCTX pCtx);
200 VMMR3_INT_DECL(RTRCPTR)         PATMR3PatchToGCPtr(PVM pVM, RTRCPTR pPatchGC, PATMTRANSSTATE *pEnmState);
201 VMMR3DECL(int)                  PATMR3QueryOpcode(PVM pVM, RTRCPTR pInstrGC, uint8_t *pByte);
202 VMMR3_INT_DECL(int)             PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *pbDst, size_t cbToRead, size_t *pcbRead);
203 VMMR3_INT_DECL(int)             PATMR3DisablePatch(PVM pVM, RTRCPTR pInstrGC);
204 VMMR3_INT_DECL(int)             PATMR3EnablePatch(PVM pVM, RTRCPTR pInstrGC);
205 VMMR3_INT_DECL(int)             PATMR3RemovePatch(PVM pVM, RTRCPTR pInstrGC);
206 VMMR3_INT_DECL(int)             PATMR3DetectConflict(PVM pVM, RTRCPTR pInstrGC, RTRCPTR pConflictGC);
207 VMMR3_INT_DECL(bool)            PATMR3HasBeenPatched(PVM pVM, RTRCPTR pInstrGC);
209 VMMR3_INT_DECL(void)            PATMR3DbgPopulateAddrSpace(PVM pVM, RTDBGAS hDbgAs);
210 VMMR3_INT_DECL(void)            PATMR3DbgAnnotatePatchedInstruction(PVM pVM, RTRCPTR RCPtr, uint8_t cbInstr,