Cross Reference: /solaris-x11-s12/open-src/kernel/i915/src/intel

Lines Matching defs:entries
1064 	DRM_DEBUG_KMS("FIFO entries required for mode: %ld\n", entries_required);
1174 	int entries, tlb_miss;
1189 	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
1192 		entries += tlb_miss;
1193 	entries = DIV_ROUND_UP(entries, display->cacheline_size);
1194 	*plane_wm = entries + display->guard_size;
1201 	entries = line_count * 64 * pixel_size;
1204 		entries += tlb_miss;
1205 	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
1206 	*cursor_wm = entries + cursor->guard_size;
1260 	int entries;
1281 	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
1282 	*display_wm = entries + display->guard_size;
1285 	entries = line_count * pixel_size * 64;
1286 	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
1287 	*cursor_wm = entries + cursor->guard_size;
1303 	int entries;
1312 	entries = (clock / 1000) * pixel_size;
1313 	*plane_prec_mult = (entries > 256) ?
1318 	entries = (clock / 1000) * 4;	/* BPP is always 4 for cursor */
1319 	*cursor_prec_mult = (entries > 256) ?
1489 	/* Calc sr entries for one plane configs */
1499 		int entries;
1504 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
1506 		entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);
1507 		srwm = I965_FIFO_SIZE - entries;
1511 		DRM_DEBUG_KMS("self-refresh entries: %d, wm: %d\n",
1512 			      entries, srwm);
1514 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
1516 		entries = DIV_ROUND_UP(entries,
1519 			(entries + i965_cursor_wm_info.guard_size);
1609 	/* Calc sr entries for one plane configs */
1618 		int entries;
1623 		entries = (((sr_latency_ns / line_time_us) + 1000) / 1000) *
1625 		entries = DIV_ROUND_UP(entries, wm_info->cacheline_size);
1626 		DRM_DEBUG_KMS("self-refresh entries: %d\n", entries);
1627 		srwm = wm_info->fifo_size - entries;
1754 	int entries;
1775 	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
1776 	*display_wm = entries + display->guard_size;
1785 	entries = line_count * pixel_size * 64;
1786 	entries = DIV_ROUND_UP(entries, cursor->cacheline_size);
1787 	*cursor_wm = entries + cursor->guard_size;
2663 	int entries, tlb_miss;
2674 	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
2678 		entries += tlb_miss;
2679 	entries = DIV_ROUND_UP(entries, display->cacheline_size);
2680 	*sprite_wm = entries + display->guard_size;
2698 	int entries;
2725 	entries = DIV_ROUND_UP(min(small, large), display->cacheline_size);
2726 	*sprite_wm = entries + display->guard_size;
2841  * and include an extra 2 entries to account for clock crossings.