Lines Matching refs:reg
529 uint32_t reg, tmp;
531 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
533 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
563 uint32_t reg, tmp;
565 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
568 tmp = I915_READ(reg);
587 I915_WRITE(reg, tmp);
588 POSTING_READ(reg);
589 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);