Lines Matching defs:reg_offset
240 int reg_offset = dev_priv->gpio_mmio_base;
249 I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
251 ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset))
254 I915_WRITE(GMBUS4 + reg_offset, 0);
271 int reg_offset = dev_priv->gpio_mmio_base;
273 #define C ((I915_READ_NOTRACE(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0)
279 I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);
283 I915_WRITE(GMBUS4 + reg_offset, 0);
296 int reg_offset = dev_priv->gpio_mmio_base;
300 I915_WRITE(GMBUS1 + reg_offset,
315 val = I915_READ(GMBUS3 + reg_offset);
328 int reg_offset = dev_priv->gpio_mmio_base;
339 I915_WRITE(GMBUS3 + reg_offset, val);
340 I915_WRITE(GMBUS1 + reg_offset,
353 I915_WRITE(GMBUS3 + reg_offset, val);
378 int reg_offset = dev_priv->gpio_mmio_base;
392 I915_WRITE(GMBUS5 + reg_offset, gmbus5);
398 I915_WRITE(GMBUS5 + reg_offset, 0);
412 int i, reg_offset;
422 reg_offset = dev_priv->gpio_mmio_base;
424 I915_WRITE(GMBUS0 + reg_offset, bus->reg0);
453 I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_STOP | GMBUS_SW_RDY);
464 I915_WRITE(GMBUS0 + reg_offset, 0);
493 I915_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
494 I915_WRITE(GMBUS1 + reg_offset, 0);
495 I915_WRITE(GMBUS0 + reg_offset, 0);
506 I915_WRITE(GMBUS0 + reg_offset, 0);