Cross Reference: /solaris-x11-s11/open-src/kernel/i915/src/intel

Lines Matching refs:dev_priv
373 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
379 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
388 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
391 	addr = dev_priv->status_page_dmah->paddr;
393 		addr |= (dev_priv->status_page_dmah->paddr >> 28) & 0xf0;
400 	drm_i915_private_t *dev_priv = dev->dev_private;
406 		gen6_gt_force_wake_get(dev_priv);
480 		gen6_gt_force_wake_put(dev_priv);
550 	struct drm_i915_private *dev_priv = dev->dev_private;
652 	struct drm_i915_private *dev_priv = dev->dev_private;
663 	for_each_ring(useless, dev_priv, i) {
681 	struct drm_i915_private *dev_priv = dev->dev_private;
682 	return dev_priv->last_seqno < seqno;
833 	drm_i915_private_t *dev_priv = dev->dev_private;
839 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
841 		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
842 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
845 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
854 	drm_i915_private_t *dev_priv = dev->dev_private;
857 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
859 		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
860 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
863 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
870 	drm_i915_private_t *dev_priv = dev->dev_private;
876 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
878 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
879 		I915_WRITE(IMR, dev_priv->irq_mask);
882 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
891 	drm_i915_private_t *dev_priv = dev->dev_private;
894 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
896 		dev_priv->irq_mask |= ring->irq_enable_mask;
897 		I915_WRITE(IMR, dev_priv->irq_mask);
900 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
907 	drm_i915_private_t *dev_priv = dev->dev_private;
913 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
915 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
916 		I915_WRITE16(IMR, dev_priv->irq_mask);
919 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
928 	drm_i915_private_t *dev_priv = dev->dev_private;
931 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
933 		dev_priv->irq_mask |= ring->irq_enable_mask;
934 		I915_WRITE16(IMR, dev_priv->irq_mask);
937 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
943 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
1026 	drm_i915_private_t *dev_priv = dev->dev_private;
1035 	gen6_gt_force_wake_get(dev_priv);
1037 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
1045 		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
1046 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
1049 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
1058 	drm_i915_private_t *dev_priv = dev->dev_private;
1061 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
1068 		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
1069 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
1072 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
1074 	gen6_gt_force_wake_put(dev_priv);
1081 	struct drm_i915_private *dev_priv = dev->dev_private;
1087 	spin_lock_irqsave(&dev_priv->rps.lock, flags);
1094 	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
1103 	struct drm_i915_private *dev_priv = dev->dev_private;
1109 	spin_lock_irqsave(&dev_priv->rps.lock, flags);
1116 	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
1270 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
1272 	if (!dev_priv->status_page_dmah) {
1273 		dev_priv->status_page_dmah =
1275 		if (!dev_priv->status_page_dmah)
1279 	ring->status_page.page_addr = (void *) dev_priv->status_page_dmah->vaddr;
1371 	struct drm_i915_private *dev_priv;
1378 	dev_priv = ring->dev->dev_private;
1473 	struct drm_i915_private *dev_priv = dev->dev_private;
1503 		ret = i915_gem_check_wedge(&dev_priv->gpu_error,
1504 					   dev_priv->mm.interruptible);
1592 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
1595 	ret = i915_gem_check_wedge(&dev_priv->gpu_error,
1596 				   dev_priv->mm.interruptible);
1610 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
1625 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
1627 	if (dev_priv->gpu_error.stop_rings & intel_ring_flag(ring))
1636        drm_i915_private_t *dev_priv = ring->dev->dev_private;
1773 	drm_i915_private_t *dev_priv = dev->dev_private;
1774 	struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
1865 	drm_i915_private_t *dev_priv = dev->dev_private;
1866 	struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
1941 	drm_i915_private_t *dev_priv = dev->dev_private;
1942 	struct intel_ring_buffer *ring = &dev_priv->ring[VCS];
1994 	drm_i915_private_t *dev_priv = dev->dev_private;
1995 	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
2026 	drm_i915_private_t *dev_priv = dev->dev_private;
2027 	struct intel_ring_buffer *ring = &dev_priv->ring[VECS];