Lines Matching refs:fbc
154 DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
234 DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
309 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
510 DRM_DEBUG_KMS("fbc set to per-chip default\n");
516 DRM_DEBUG_KMS("fbc disabled per module param\n");
1703 DRM_DEBUG_KMS("watermark %d: display plane %d, fbc lines %d,"
1707 DRM_DEBUG_KMS("fbc watermark(%d) is too large(%d), disabling wm%d+\n",
1710 /* fbc has it's own way to disable FBC WM */
2178 uint16_t fbc;
2298 if (result->fbc_val > max->fbc) {
2428 lp_max_1_2->fbc = lp_max_5_6->fbc = 15;
4108 * set in order to enable memory self-refresh and fbc: