Lines Matching defs:level
1029 * intel_calculate_wm - calculate watermark level
1035 * Calculate the watermark level (the level at which the display plane will
1041 * on the pixel size. When it reaches the watermark level, it'll start
1068 DRM_DEBUG_KMS("FIFO watermark level: %ld\n", wm_size);
1696 static bool ironlake_check_srwm(struct drm_device *dev, int level,
1704 " cursor %d\n", level, display_wm, fbc_wm, cursor_wm);
1708 fbc_wm, SNB_FBC_MAX_SRWM, level);
1722 display_wm, SNB_DISPLAY_MAX_SRWM, level);
1728 cursor_wm, SNB_CURSOR_MAX_SRWM, level);
1733 DRM_DEBUG_KMS("latency %d is 0, disabling wm%d+\n", level, level);
1743 static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
1789 return ironlake_check_srwm(dev, level,
2441 int level, max_level, wm_lp;
2443 for (level = 1; level <= 4; level++)
2444 if (!hsw_compute_lp_wm(wm[level], lp_maximums, params,
2445 &lp_results[level - 1]))
2447 max_level = level - 1;
2450 * a WM level. */
2452 for (level = 1; level <= max_level; level++) {
2453 if (!lp_results[level - 1].fbc_enable) {
2463 level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp;
2464 if (level > max_level)
2467 r = &lp_results[level - 1];
2468 results->wm_lp[wm_lp - 1] = HSW_WM_LP_VAL(level * 2,
2486 /* Find the result with the highest level enabled. Check for enable_fbc_wm in
2487 * case both are at the same level. Prefer r1 in case they're the same. */
3042 /* Only set the down limit when we've reached the lowest level to avoid