Lines Matching refs:tmp
446 u32 tmp;
469 tmp = I915_READ(BLC_PWM_CTL);
472 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
473 I915_WRITE(BLC_PWM_CTL, tmp | level);
529 uint32_t reg, tmp;
536 tmp = I915_READ(BLC_PWM_PCH_CTL1);
537 tmp &= ~BLM_PCH_PWM_ENABLE;
538 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
563 uint32_t reg, tmp;
568 tmp = I915_READ(reg);
573 if (tmp & BLM_PWM_ENABLE)
577 tmp &= ~BLM_PIPE_SELECT_IVB;
579 tmp &= ~BLM_PIPE_SELECT;
582 tmp |= BLM_TRANSCODER_EDP;
584 tmp |= BLM_PIPE(cpu_transcoder);
585 tmp &= ~BLM_PWM_ENABLE;
587 I915_WRITE(reg, tmp);
589 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
593 tmp = I915_READ(BLC_PWM_PCH_CTL1);
594 tmp |= BLM_PCH_PWM_ENABLE;
595 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
596 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);