Lines Matching defs:overlay
42 /* Limits for overlay size. According to intel doc, the real limits are:
52 /* overlay register definitions */
112 /* overlay flip addr flag */
123 /* memory bufferd overlay registers */
198 intel_overlay_map_regs(struct intel_overlay *overlay)
202 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
203 regs = (struct overlay_registers *)overlay->reg_bo->phys_obj->handle->vaddr;
205 regs = (struct overlay_registers *)(uintptr_t)overlay->reg_bo->page_list[0];
210 static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
216 static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
219 struct drm_device *dev = overlay->dev;
224 BUG_ON(overlay->last_flip_req);
225 ret = i915_add_request(ring, &overlay->last_flip_req);
229 overlay->flip_tail = tail;
230 ret = i915_wait_seqno(ring, overlay->last_flip_req);
235 overlay->last_flip_req = 0;
239 /* overlay needs to be disable in OCMD reg */
240 static int intel_overlay_on(struct intel_overlay *overlay)
242 struct drm_device *dev = overlay->dev;
247 BUG_ON(overlay->active);
248 overlay->active = 1;
257 intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE);
262 return intel_overlay_do_wait_request(overlay, NULL);
265 /* overlay needs to be enabled in OCMD reg */
266 static int intel_overlay_continue(struct intel_overlay *overlay,
269 struct drm_device *dev = overlay->dev;
272 u32 flip_addr = overlay->flip_addr;
276 BUG_ON(!overlay->active);
284 DRM_DEBUG("overlay underrun, DOVSTA: %x\n", tmp);
294 return i915_add_request(ring, &overlay->last_flip_req);
297 static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
299 struct drm_i915_gem_object *obj = overlay->old_vid_bo;
304 overlay->old_vid_bo = NULL;
307 static void intel_overlay_off_tail(struct intel_overlay *overlay)
309 struct drm_i915_gem_object *obj = overlay->vid_bo;
311 /* never have the overlay hw on without showing a frame */
312 BUG_ON(!overlay->vid_bo);
316 overlay->vid_bo = NULL;
318 overlay->crtc->overlay = NULL;
319 overlay->crtc = NULL;
320 overlay->active = 0;
323 /* overlay needs to be disabled in OCMD reg */
324 static int intel_overlay_off(struct intel_overlay *overlay)
326 struct drm_device *dev = overlay->dev;
329 u32 flip_addr = overlay->flip_addr;
332 BUG_ON(!overlay->active);
334 /* According to intel docs the overlay hw may hang (when switching
336 * this applies to the disabling of the overlay or to the switching off
344 /* wait for overlay to go idle */
348 /* turn overlay off */
350 /* Workaround: Don't disable the overlay fully, since otherwise
362 return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail);
367 static int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay)
369 struct drm_device *dev = overlay->dev;
374 if (overlay->last_flip_req == 0)
377 ret = i915_wait_seqno(ring, overlay->last_flip_req);
382 if (overlay->flip_tail)
383 overlay->flip_tail(overlay);
385 overlay->last_flip_req = 0;
389 /* Wait for pending overlay flip and release old frame.
390 * Needs to be called before the overlay register are changed
393 static int intel_overlay_release_old_vid(struct intel_overlay *overlay)
395 struct drm_device *dev = overlay->dev;
403 if (!overlay->old_vid_bo)
416 ret = intel_overlay_do_wait_request(overlay,
422 intel_overlay_release_old_vid_tail(overlay);
548 static bool update_scaling_factors(struct intel_overlay *overlay,
583 if (xscale != overlay->old_xscale || yscale != overlay->old_yscale)
585 overlay->old_xscale = xscale;
586 overlay->old_yscale = yscale;
605 static void update_colorkey(struct intel_overlay *overlay,
608 u32 key = overlay->color_key;
610 switch (overlay->crtc->base.fb->bits_per_pixel) {
617 if (overlay->crtc->base.fb->depth == 15) {
679 static int intel_overlay_do_put_image(struct intel_overlay *overlay,
687 struct drm_device *dev = overlay->dev;
692 BUG_ON(!overlay);
694 ret = intel_overlay_release_old_vid(overlay);
706 if (!overlay->active) {
708 regs = intel_overlay_map_regs(overlay);
714 if (IS_GEN4(overlay->dev))
716 oconfig |= overlay->crtc->pipe == 0 ?
719 intel_overlay_unmap_regs(overlay, regs);
721 ret = intel_overlay_on(overlay);
726 regs = intel_overlay_map_regs(overlay);
741 swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);
751 tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
753 tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
766 scale_changed = update_scaling_factors(overlay, regs, params);
768 update_colorkey(overlay, regs);
772 intel_overlay_unmap_regs(overlay, regs);
774 ret = intel_overlay_continue(overlay, scale_changed);
778 overlay->old_vid_bo = overlay->vid_bo;
779 overlay->vid_bo = new_bo;
788 int intel_overlay_switch_off(struct intel_overlay *overlay)
791 struct drm_device *dev = overlay->dev;
798 ret = intel_overlay_recover_from_interrupt(overlay);
802 if (!overlay->active)
805 ret = intel_overlay_release_old_vid(overlay);
809 regs = intel_overlay_map_regs(overlay);
811 intel_overlay_unmap_regs(overlay, regs);
813 ret = intel_overlay_off(overlay);
817 intel_overlay_off_tail(overlay);
821 static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
824 drm_i915_private_t *dev_priv = overlay->dev->dev_private;
829 /* can't use the overlay with double wide pipe */
830 if (INTEL_INFO(overlay->dev)->gen < 4 &&
837 static void update_pfit_vscale_ratio(struct intel_overlay *overlay)
839 struct drm_device *dev = overlay->dev;
858 overlay->pfit_vscale_ratio = ratio;
861 static int check_overlay_dst(struct intel_overlay *overlay,
864 struct drm_display_mode *mode = &overlay->crtc->base.mode;
1032 struct intel_overlay *overlay;
1040 overlay = dev_priv->overlay;
1041 if (!overlay) {
1042 DRM_DEBUG("userspace bug: no overlay\n");
1050 ret = intel_overlay_switch_off(overlay);
1081 DRM_ERROR("buffer used for overlay image can not be tiled\n");
1086 ret = intel_overlay_recover_from_interrupt(overlay);
1090 if (overlay->crtc != crtc) {
1092 ret = intel_overlay_switch_off(overlay);
1096 ret = check_overlay_possible_on_crtc(overlay, crtc);
1100 overlay->crtc = crtc;
1101 crtc->overlay = overlay;
1106 overlay->pfit_active = 1;
1107 update_pfit_vscale_ratio(overlay);
1109 overlay->pfit_active = 0;
1112 ret = check_overlay_dst(overlay, put_image_rec);
1116 if (overlay->pfit_active) {
1118 overlay->pfit_vscale_ratio);
1121 overlay->pfit_vscale_ratio) + 1;
1154 ret = intel_overlay_do_put_image(overlay, new_bo, params);
1175 static void update_reg_attrs(struct intel_overlay *overlay,
1178 regs->OCLRC0 = (overlay->contrast << 18) | (overlay->brightness & 0xff);
1179 regs->OCLRC1 = overlay->saturation;
1230 struct intel_overlay *overlay;
1235 overlay = dev_priv->overlay;
1236 if (!overlay) {
1237 DRM_DEBUG("userspace bug: no overlay\n");
1246 attrs->color_key = overlay->color_key;
1247 attrs->brightness = overlay->brightness;
1248 attrs->contrast = overlay->contrast;
1249 attrs->saturation = overlay->saturation;
1267 overlay->color_key = attrs->color_key;
1268 overlay->brightness = attrs->brightness;
1269 overlay->contrast = attrs->contrast;
1270 overlay->saturation = attrs->saturation;
1272 regs = intel_overlay_map_regs(overlay);
1278 update_reg_attrs(overlay, regs);
1280 intel_overlay_unmap_regs(overlay, regs);
1286 if (overlay->active) {
1315 struct intel_overlay *overlay;
1323 overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
1324 if (!overlay)
1328 if (dev_priv->overlay) {
1333 overlay->dev = dev;
1340 overlay->reg_bo = reg_bo;
1347 DRM_ERROR("failed to attach phys overlay regs\n");
1350 overlay->flip_addr = reg_bo->phys_obj->handle->paddr;
1354 DRM_ERROR("failed to pin overlay register bo\n");
1357 overlay->flip_addr = reg_bo->gtt_offset;
1361 DRM_ERROR("failed to move overlay register bo into the GTT\n");
1367 overlay->color_key = 0x0101fe;
1368 overlay->brightness = UINT_MAX-19;
1369 overlay->contrast = 75;
1370 overlay->saturation = 146;
1372 regs = intel_overlay_map_regs(overlay);
1378 update_reg_attrs(overlay, regs);
1380 intel_overlay_unmap_regs(overlay, regs);
1382 dev_priv->overlay = overlay;
1384 DRM_INFO("initialized overlay support\n");
1394 kfree(overlay, sizeof(*overlay));
1402 if (!dev_priv->overlay)
1408 BUG_ON(dev_priv->overlay->active);
1410 drm_gem_object_unreference_unlocked(&dev_priv->overlay->reg_bo->base);
1411 kfree(dev_priv->overlay, sizeof(*dev_priv->overlay));
1423 intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
1425 drm_i915_private_t *dev_priv = overlay->dev->dev_private;
1428 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
1429 regs = overlay->reg_bo->phys_obj->handle->vaddr;
1432 overlay->reg_bo->gtt_offset);
1437 static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
1440 if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
1449 struct intel_overlay *overlay = dev_priv->overlay;
1453 if (!overlay || !overlay->active)
1462 if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
1463 error->base = (long) overlay->reg_bo->phys_obj->handle->vaddr;
1465 error->base = (long) overlay->reg_bo->gtt_offset;
1467 regs = intel_overlay_map_regs_atomic(overlay);
1472 intel_overlay_unmap_regs_atomic(overlay, regs);