Lines Matching refs:temp
134 u32 temp;
136 temp = I915_READ(lvds_encoder->reg);
137 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
140 temp &= ~PORT_TRANS_SEL_MASK;
141 temp |= PORT_TRANS_SEL_CPT(pipe);
144 temp |= LVDS_PIPEB_SELECT;
146 temp &= ~LVDS_PIPEB_SELECT;
151 temp &= ~LVDS_BORDER_ENABLE;
152 temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
157 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
159 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
174 temp |= LVDS_ENABLE_DITHER;
176 temp &= ~LVDS_ENABLE_DITHER;
178 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
180 temp |= LVDS_HSYNC_POLARITY;
182 temp |= LVDS_VSYNC_POLARITY;
184 I915_WRITE(lvds_encoder->reg, temp);