Lines Matching refs:I915_WRITE
69 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0);
85 I915_WRITE(DSPCLK_GATE_D, val);
249 I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en);
254 I915_WRITE(GMBUS4 + reg_offset, 0);
279 I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);
283 I915_WRITE(GMBUS4 + reg_offset, 0);
300 I915_WRITE(GMBUS1 + reg_offset,
339 I915_WRITE(GMBUS3 + reg_offset, val);
340 I915_WRITE(GMBUS1 + reg_offset,
353 I915_WRITE(GMBUS3 + reg_offset, val);
392 I915_WRITE(GMBUS5 + reg_offset, gmbus5);
398 I915_WRITE(GMBUS5 + reg_offset, 0);
424 I915_WRITE(GMBUS0 + reg_offset, bus->reg0);
453 I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_STOP | GMBUS_SW_RDY);
464 I915_WRITE(GMBUS0 + reg_offset, 0);
493 I915_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
494 I915_WRITE(GMBUS1 + reg_offset, 0);
495 I915_WRITE(GMBUS0 + reg_offset, 0);
506 I915_WRITE(GMBUS0 + reg_offset, 0);