Cross Reference: /solaris-x11-s11/open-src/kernel/i915/src/intel

Lines Matching refs:panel
48  * is_edp - is the given port attached to an eDP panel (either CPU or PCH)
51  * If a CPU or PCH DP output is attached to an eDP panel, this function
131 	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
702 	if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
703 		intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
707 						 intel_connector->panel.fitting_mode);
710 						intel_connector->panel.fitting_mode);
941 	DRM_DEBUG_KMS("Wait for panel power on\n");
947 	DRM_DEBUG_KMS("Wait for panel power off time\n");
953 	DRM_DEBUG_KMS("Wait for panel power cycle\n");
1012 	 * If the panel wasn't on, delay before accessing aux channel
1074 		 * to keep the panel power up across a sequence of operations
1120 		pp |= PANEL_POWER_RESET; /* restore panel reset bit */
1139 		DRM_ERROR("Need VDD to turn off panel");
1168 	 * If we enable the backlight right away following a panel power
1169 	 * on, we may see slight flicker as the panel syncs with the eDP
1385 	/* Make sure the panel is off before trying to change the mode. But also
1386 	 * ensure that we have vdd while we switch off the panel. */
2605 	if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
2608 					  intel_connector->panel.fixed_mode);
2703 		if (intel_connector->panel.fitting_mode == val) {
2707 		intel_connector->panel.fitting_mode = (int) val;
2732 		intel_panel_fini(&intel_connector->panel);
2842 		intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
2933 	DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n",
2975 	/* Haswell doesn't have any port selection bits for the panel
2992 	DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n",
3070 	intel_panel_init(&intel_connector->panel, fixed_mode);