Lines Matching refs:limit
335 const intel_limit_t *limit;
340 limit = &intel_limits_ironlake_dual_lvds_100m;
342 limit = &intel_limits_ironlake_dual_lvds;
345 limit = &intel_limits_ironlake_single_lvds_100m;
347 limit = &intel_limits_ironlake_single_lvds;
350 limit = &intel_limits_ironlake_dac;
352 return limit;
358 const intel_limit_t *limit;
362 limit = &intel_limits_g4x_dual_channel_lvds;
364 limit = &intel_limits_g4x_single_channel_lvds;
367 limit = &intel_limits_g4x_hdmi;
369 limit = &intel_limits_g4x_sdvo;
371 limit = &intel_limits_i9xx_sdvo;
373 return limit;
379 const intel_limit_t *limit;
382 limit = intel_ironlake_limit(crtc, refclk);
384 limit = intel_g4x_limit(crtc);
387 limit = &intel_limits_pineview_lvds;
389 limit = &intel_limits_pineview_sdvo;
392 limit = &intel_limits_vlv_dac;
394 limit = &intel_limits_vlv_hdmi;
396 limit = &intel_limits_vlv_dp;
399 limit = &intel_limits_i9xx_lvds;
401 limit = &intel_limits_i9xx_sdvo;
404 limit = &intel_limits_i8xx_lvds;
406 limit = &intel_limits_i8xx_dvo;
408 return limit;
455 const intel_limit_t *limit,
458 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
460 if (clock->p < limit->p.min || limit->p.max < clock->p)
462 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)
464 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)
468 if (clock->m < limit->m.min || limit->m.max < clock->m)
470 if (clock->n < limit->n.min || limit->n.max < clock->n)
472 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
477 if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)
484 i9xx_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
499 clock.p2 = limit->p2.p2_fast;
501 clock.p2 = limit->p2.p2_slow;
503 if (target < limit->p2.dot_limit)
504 clock.p2 = limit->p2.p2_slow;
506 clock.p2 = limit->p2.p2_fast;
511 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
513 for (clock.m2 = limit->m2.min;
514 clock.m2 <= limit->m2.max; clock.m2++) {
517 for (clock.n = limit->n.min;
518 clock.n <= limit->n.max; clock.n++) {
519 for (clock.p1 = limit->p1.min;
520 clock.p1 <= limit->p1.max; clock.p1++) {
524 if (!intel_PLL_is_valid(dev, limit,
545 pnv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
560 clock.p2 = limit->p2.p2_fast;
562 clock.p2 = limit->p2.p2_slow;
564 if (target < limit->p2.dot_limit)
565 clock.p2 = limit->p2.p2_slow;
567 clock.p2 = limit->p2.p2_fast;
572 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
574 for (clock.m2 = limit->m2.min;
575 clock.m2 <= limit->m2.max; clock.m2++) {
576 for (clock.n = limit->n.min;
577 clock.n <= limit->n.max; clock.n++) {
578 for (clock.p1 = limit->p1.min;
579 clock.p1 <= limit->p1.max; clock.p1++) {
583 if (!intel_PLL_is_valid(dev, limit,
604 g4x_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
618 clock.p2 = limit->p2.p2_fast;
620 clock.p2 = limit->p2.p2_slow;
622 if (target < limit->p2.dot_limit)
623 clock.p2 = limit->p2.p2_slow;
625 clock.p2 = limit->p2.p2_fast;
629 max_n = limit->n.max;
631 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
633 for (clock.m1 = limit->m1.max;
634 clock.m1 >= limit->m1.min; clock.m1--) {
635 for (clock.m2 = limit->m2.max;
636 clock.m2 >= limit->m2.min; clock.m2--) {
637 for (clock.p1 = limit->p1.max;
638 clock.p1 >= limit->p1.min; clock.p1--) {
642 if (!intel_PLL_is_valid(dev, limit,
661 vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
682 for (n = limit->n.min; n <= ((refclk) / minupdate); n++) {
684 for (p1 = limit->p1.max; p1 > limit->p1.min; p1--) {
685 for (p2 = limit->p2.p2_fast+1; p2 > 0; p2--) {
690 for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) {
695 if (vco >= limit->vco.min && vco < limit->vco.max) {
4863 const intel_limit_t *limit;
4883 limit = intel_limit(crtc, refclk);
4884 ok = dev_priv->display.find_dpll(limit, crtc,
4903 dev_priv->display.find_dpll(limit, crtc,
5512 const intel_limit_t *limit;
5530 limit = intel_limit(crtc, refclk);
5531 ret = dev_priv->display.find_dpll(limit, crtc,
5545 dev_priv->display.find_dpll(limit, crtc,
7723 DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",