Lines Matching refs:adjusted_mode

4012 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
4026 fdi_dotclock = adjusted_mode->clock;
4070 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
4083 drm_mode_set_crtcinfo(adjusted_mode, 0);
4089 adjusted_mode->hsync_start == adjusted_mode->hdisplay)
4685 struct drm_display_mode *adjusted_mode =
4686 &intel_crtc->config.adjusted_mode;
4692 crtc_vtotal = adjusted_mode->crtc_vtotal;
4693 crtc_vblank_end = adjusted_mode->crtc_vblank_end;
4695 if (!IS_GEN2(dev) && adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
4699 vsyncshift = adjusted_mode->crtc_hsync_start
4700 - adjusted_mode->crtc_htotal / 2;
4709 (adjusted_mode->crtc_hdisplay - 1) |
4710 ((adjusted_mode->crtc_htotal - 1) << 16));
4712 (adjusted_mode->crtc_hblank_start - 1) |
4713 ((adjusted_mode->crtc_hblank_end - 1) << 16));
4715 (adjusted_mode->crtc_hsync_start - 1) |
4716 ((adjusted_mode->crtc_hsync_end - 1) << 16));
4719 (adjusted_mode->crtc_vdisplay - 1) |
4722 (adjusted_mode->crtc_vblank_start - 1) |
4725 (adjusted_mode->crtc_vsync_start - 1) |
4726 ((adjusted_mode->crtc_vsync_end - 1) << 16));
4752 pipe_config->adjusted_mode.crtc_hdisplay = (tmp & 0xffff) + 1;
4753 pipe_config->adjusted_mode.crtc_htotal = ((tmp >> 16) & 0xffff) + 1;
4755 pipe_config->adjusted_mode.crtc_hblank_start = (tmp & 0xffff) + 1;
4756 pipe_config->adjusted_mode.crtc_hblank_end = ((tmp >> 16) & 0xffff) + 1;
4758 pipe_config->adjusted_mode.crtc_hsync_start = (tmp & 0xffff) + 1;
4759 pipe_config->adjusted_mode.crtc_hsync_end = ((tmp >> 16) & 0xffff) + 1;
4762 pipe_config->adjusted_mode.crtc_vdisplay = (tmp & 0xffff) + 1;
4763 pipe_config->adjusted_mode.crtc_vtotal = ((tmp >> 16) & 0xffff) + 1;
4765 pipe_config->adjusted_mode.crtc_vblank_start = (tmp & 0xffff) + 1;
4766 pipe_config->adjusted_mode.crtc_vblank_end = ((tmp >> 16) & 0xffff) + 1;
4768 pipe_config->adjusted_mode.crtc_vsync_start = (tmp & 0xffff) + 1;
4769 pipe_config->adjusted_mode.crtc_vsync_end = ((tmp >> 16) & 0xffff) + 1;
4772 pipe_config->adjusted_mode.flags |= DRM_MODE_FLAG_INTERLACE;
4773 pipe_config->adjusted_mode.crtc_vtotal += 1;
4774 pipe_config->adjusted_mode.crtc_vblank_end += 1;
4835 intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
5403 if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
5491 if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
6071 struct drm_display_mode *adjusted_mode =
6072 &intel_crtc->config.adjusted_mode;
6095 encoder_funcs->mode_set(&encoder->base, mode, adjusted_mode);
7808 drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
7859 drm_mode_copy(&pipe_config->adjusted_mode, mode);
7900 &pipe_config->adjusted_mode))) {
7909 pipe_config->port_clock = pipe_config->adjusted_mode.clock;
8148 PIPE_CONF_CHECK_I(adjusted_mode.crtc_hdisplay);
8149 PIPE_CONF_CHECK_I(adjusted_mode.crtc_htotal);
8150 PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_start);
8151 PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_end);
8152 PIPE_CONF_CHECK_I(adjusted_mode.crtc_hsync_start);
8153 PIPE_CONF_CHECK_I(adjusted_mode.crtc_hsync_end);
8155 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vdisplay);
8156 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vtotal);
8157 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vblank_start);
8158 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vblank_end);
8159 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start);
8160 PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end);
8165 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8169 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8171 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8173 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8175 PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
8488 crtc->hwmode = pipe_config->adjusted_mode;