Lines Matching defs:reg_val
4337 u32 reg_val;
4343 reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
4344 reg_val &= 0xffffff00;
4345 reg_val |= 0x00000030;
4346 vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
4348 reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
4349 reg_val &= 0x8cffffff;
4350 reg_val = 0x8c000000;
4351 vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
4353 reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
4354 reg_val &= 0xffffff00;
4355 vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
4357 reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
4358 reg_val &= 0x00ffffff;
4359 reg_val |= 0xb0000000;
4360 vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
4413 u32 coreclk, reg_val, dpll_md;
4433 reg_val = vlv_dpio_read(dev_priv, DPIO_IREF_CTL(pipe));
4434 reg_val &= 0x00ffffff;
4435 vlv_dpio_write(dev_priv, DPIO_IREF_CTL(pipe), reg_val);