Lines Matching refs:temp

174 	u32 temp, i, rx_ctl_val;
236 temp = I915_READ(_FDI_RXA_MISC);
237 temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
238 I915_WRITE(_FDI_RXA_MISC, temp);
244 temp = I915_READ(DP_TP_STATUS(PORT_E));
245 if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) {
258 temp = I915_READ(DDI_BUF_CTL(PORT_E));
259 temp &= ~DDI_BUF_CTL_ENABLE;
260 I915_WRITE(DDI_BUF_CTL(PORT_E), temp);
264 temp = I915_READ(DP_TP_CTL(PORT_E));
265 temp &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);
266 temp |= DP_TP_CTL_LINK_TRAIN_PAT1;
267 I915_WRITE(DP_TP_CTL(PORT_E), temp);
277 temp = I915_READ(_FDI_RXA_MISC);
278 temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
279 temp |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);
280 I915_WRITE(_FDI_RXA_MISC, temp);
737 uint32_t temp;
741 temp = TRANS_MSA_SYNC_CLK;
744 temp |= TRANS_MSA_6_BPC;
747 temp |= TRANS_MSA_8_BPC;
750 temp |= TRANS_MSA_10_BPC;
753 temp |= TRANS_MSA_12_BPC;
758 I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);
772 uint32_t temp;
775 temp = TRANS_DDI_FUNC_ENABLE;
776 temp |= TRANS_DDI_SELECT_PORT(port);
780 temp |= TRANS_DDI_BPC_6;
783 temp |= TRANS_DDI_BPC_8;
786 temp |= TRANS_DDI_BPC_10;
789 temp |= TRANS_DDI_BPC_12;
796 temp |= TRANS_DDI_PVSYNC;
798 temp |= TRANS_DDI_PHSYNC;
807 temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
809 temp |= TRANS_DDI_EDP_INPUT_A_ON;
812 temp |= TRANS_DDI_EDP_INPUT_B_ONOFF;
815 temp |= TRANS_DDI_EDP_INPUT_C_ONOFF;
827 temp |= TRANS_DDI_MODE_SELECT_HDMI;
829 temp |= TRANS_DDI_MODE_SELECT_DVI;
832 temp |= TRANS_DDI_MODE_SELECT_FDI;
833 temp |= (intel_crtc->config.fdi_lanes - 1) << 1;
838 temp |= TRANS_DDI_MODE_SELECT_DP_SST;
840 temp |= DDI_PORT_WIDTH(intel_dp->lane_count);
847 I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
952 uint32_t temp, ret;
961 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
962 temp &= TRANS_DDI_PORT_MASK;
965 if (temp == TRANS_DDI_SELECT_PORT(i))
1278 u32 temp, flags = 0;
1280 temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
1281 if (temp & TRANS_DDI_PHSYNC)
1285 if (temp & TRANS_DDI_PVSYNC)