Lines Matching refs:DP_TP_CTL
205 /* Configure DP_TP_CTL with auto-training */
206 I915_WRITE(DP_TP_CTL(PORT_E),
249 I915_WRITE(DP_TP_CTL(PORT_E),
263 /* Disable DP_TP_CTL and FDI_RX_CTL and retry */
264 temp = I915_READ(DP_TP_CTL(PORT_E));
267 I915_WRITE(DP_TP_CTL(PORT_E), temp);
268 POSTING_READ(DP_TP_CTL(PORT_E));
1082 val = I915_READ(DP_TP_CTL(port));
1085 I915_WRITE(DP_TP_CTL(port), val);
1205 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) {
1213 val = I915_READ(DP_TP_CTL(port));
1216 I915_WRITE(DP_TP_CTL(port), val);
1217 POSTING_READ(DP_TP_CTL(port));
1227 I915_WRITE(DP_TP_CTL(port), val);
1228 POSTING_READ(DP_TP_CTL(port));