Lines Matching refs:DDI_BUF_CTL
149 uint32_t reg = DDI_BUF_CTL(port);
212 /* Configure and enable DDI_BUF_CTL for DDI E with next voltage.
216 I915_WRITE(DDI_BUF_CTL(PORT_E),
220 POSTING_READ(DDI_BUF_CTL(PORT_E));
258 temp = I915_READ(DDI_BUF_CTL(PORT_E));
260 I915_WRITE(DDI_BUF_CTL(PORT_E), temp);
261 POSTING_READ(DDI_BUF_CTL(PORT_E));
910 tmp = I915_READ(DDI_BUF_CTL(port));
1075 val = I915_READ(DDI_BUF_CTL(port));
1078 I915_WRITE(DDI_BUF_CTL(port), val);
1119 I915_WRITE(DDI_BUF_CTL(port),
1206 val = I915_READ(DDI_BUF_CTL(port));
1209 I915_WRITE(DDI_BUF_CTL(port), val);
1231 I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP);
1232 POSTING_READ(DDI_BUF_CTL(port));
1361 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
1364 intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
1385 intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);