Lines Matching refs:iir
920 u32 iir, gt_iir, pm_iir;
929 iir = I915_READ(VLV_IIR);
933 if (gt_iir == 0 && pm_iir == 0 && iir == 0)
968 if (iir & I915_DISPLAY_PORT_INTERRUPT) {
989 I915_WRITE(VLV_IIR, iir);
1154 /* disable master interrupt before clearing iir */
1264 /* disable master interrupt before clearing iir */
2951 int pipe, u16 iir)
2959 if ((iir & flip_pending) == 0)
2983 u16 iir, new_iir;
2993 iir = I915_READ16(IIR);
2994 if (iir == 0)
2997 while (iir & ~flip_mask) {
2998 /* Can't rely on pipestat interrupt bit in iir as it might
3000 * It doesn't set the bit in iir again, but it still produces
3004 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
3023 I915_WRITE16(IIR, iir & ~flip_mask);
3028 if (iir & I915_USER_INTERRUPT)
3032 i8xx_handle_vblank(dev, 0, iir))
3036 i8xx_handle_vblank(dev, 1, iir))
3039 iir = new_iir;
3126 int plane, int pipe, u32 iir)
3134 if ((iir & flip_pending) == 0)
3158 u32 iir, new_iir, pipe_stats[I915_MAX_PIPES];
3167 iir = I915_READ(IIR);
3169 bool irq_received = (iir & ~flip_mask) != 0;
3171 /* Can't rely on pipestat interrupt bit in iir as it might
3173 * It doesn't set the bit in iir again, but it still produces
3177 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
3200 (iir & I915_DISPLAY_PORT_INTERRUPT)) {
3213 I915_WRITE(IIR, iir & ~flip_mask);
3216 if (iir & I915_USER_INTERRUPT)
3225 i915_handle_vblank(dev, plane, pipe, iir))
3231 /* With MSI, interrupts are only generated when iir
3233 * set while we were handling the existing iir bits, then
3247 iir = new_iir;
3248 } while (iir & ~flip_mask);
3387 u32 iir, new_iir;
3398 iir = I915_READ(IIR);
3402 irq_received = (iir & ~flip_mask) != 0;
3404 /* Can't rely on pipestat interrupt bit in iir as it might
3406 * It doesn't set the bit in iir again, but it still produces
3410 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
3436 if (iir & I915_DISPLAY_PORT_INTERRUPT) {
3452 I915_WRITE(IIR, iir & ~flip_mask);
3455 if (iir & I915_USER_INTERRUPT)
3457 if (iir & I915_BSD_USER_INTERRUPT)
3462 i915_handle_vblank(dev, pipe, pipe, iir))
3469 /* With MSI, interrupts are only generated when iir
3471 * set while we were handling the existing iir bits, then
3484 iir = new_iir;