Lines Matching refs:IIR
806 * IIR bits should never already be set because IMR should
807 * prevent an interrupt from being shown in IIR. The warning
946 * Clear the PIPE*STAT regs before the IIR
967 /* Consume port. Then clear IIR or we'll miss events */
1028 DRM_DEBUG_DRIVER(" pipe %c FDI IIR: 0x%08x\n",
1127 DRM_DEBUG_DRIVER(" pipe %c FDI IIR: 0x%08x\n",
2063 I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
2965 * to '0' on the following vblank, i.e. IIR has the Pendingflip
2993 iir = I915_READ16(IIR);
3012 * Clear the PIPE*STAT regs before the IIR
3023 I915_WRITE16(IIR, iir & ~flip_mask);
3024 new_iir = I915_READ16(IIR); /* Flush posted writes */
3057 I915_WRITE16(IIR, I915_READ16(IIR));
3140 * to '0' on the following vblank, i.e. IIR has the Pendingflip
3167 iir = I915_READ(IIR);
3184 /* Clear the PIPE*STAT regs before the IIR */
3198 /* Consume port. Then clear IIR or we'll miss events */
3213 I915_WRITE(IIR, iir & ~flip_mask);
3214 new_iir = I915_READ(IIR); /* Flush posted writes */
3241 * if an interrupt landed in the time between writing IIR and
3276 I915_WRITE(IIR, I915_READ(IIR));
3398 iir = I915_READ(IIR);
3418 * Clear the PIPE*STAT regs before the IIR
3435 /* Consume port. Then clear IIR or we'll miss events */
3452 I915_WRITE(IIR, iir & ~flip_mask);
3453 new_iir = I915_READ(IIR); /* Flush posted writes */
3479 * if an interrupt landed in the time between writing IIR and
3514 I915_WRITE(IIR, I915_READ(IIR));