Lines Matching refs:I915_READ
183 I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~bit);
185 I915_WRITE(SDEIMR, I915_READ(SDEIMR) | bit);
204 I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~SDE_ERROR_CPT);
206 I915_WRITE(SDEIMR, I915_READ(SDEIMR) | SDE_ERROR_CPT);
321 u32 pipestat = I915_READ(reg) & 0x7fff0000;
336 u32 pipestat = I915_READ(reg) & 0x7fff0000;
367 return I915_READ(PIPECONF(pipe)) & PIPECONF_ENABLE;
396 high1 = I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK;
397 low = I915_READ(low_frame) & PIPE_FRAME_LOW_MASK;
398 high2 = I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK;
417 return I915_READ(reg);
438 vtotal = 1 + ((I915_READ(VTOTAL(cpu_transcoder)) >> 16) & 0x1fff);
444 position = I915_READ(PIPEDSL(pipe));
456 position = (I915_READ(PIPEFRAMEPIXEL(pipe)) & PIPE_PIXEL_MASK) >> PIPE_PIXEL_SHIFT;
458 htotal = 1 + ((I915_READ(HTOTAL(cpu_transcoder)) >> 16) & 0x1fff);
464 vbl = I915_READ(VBLANK(cpu_transcoder));
618 I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS));
623 busy_up = I915_READ(RCPREVBSYTUPAVG);
624 busy_down = I915_READ(RCPREVBSYTDNAVG);
625 max_avg = I915_READ(RCBMAXAVG);
626 min_avg = I915_READ(RCBMINAVG);
674 pm_imr = I915_READ(GEN6_PMIMR);
734 misccpctl = I915_READ(GEN7_MISCCPCTL);
738 error_status = I915_READ(GEN7_L3CDERRST1);
929 iir = I915_READ(VLV_IIR);
930 gt_iir = I915_READ(GTIIR);
931 pm_iir = I915_READ(GEN6_PMIIR);
943 pipe_stats[pipe] = I915_READ(reg);
969 u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
978 I915_READ(PORT_HOTPLUG_STAT);
1030 I915_READ(FDI_RX_IIR(pipe)));
1052 u32 err_int = I915_READ(GEN7_ERR_INT);
1075 u32 serr_int = I915_READ(SERR_INT);
1129 I915_READ(FDI_RX_IIR(pipe)));
1155 de_ier = I915_READ(DEIER);
1164 sde_ier = I915_READ(SDEIER);
1178 gt_iir = I915_READ(GTIIR);
1185 de_iir = I915_READ(DEIIR);
1205 u32 pch_iir = I915_READ(SDEIIR);
1217 pm_iir = I915_READ(GEN6_PMIIR);
1265 de_ier = I915_READ(DEIER);
1274 sde_ier = I915_READ(SDEIER);
1278 de_iir = I915_READ(DEIIR);
1279 gt_iir = I915_READ(GTIIR);
1280 pm_iir = I915_READ(GEN6_PMIIR);
1325 u32 pch_iir = I915_READ(SDEIIR);
1436 instdone[0] = I915_READ(INSTDONE);
1441 instdone[0] = I915_READ(INSTDONE_I965);
1442 instdone[1] = I915_READ(INSTDONE1);
1447 instdone[0] = I915_READ(GEN7_INSTDONE_1);
1448 instdone[1] = I915_READ(GEN7_SC_INSTDONE);
1449 instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
1450 instdone[3] = I915_READ(GEN7_ROW_INSTDONE);
1648 error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
1651 error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
1670 u32 acthd = I915_READ(ACTHD);
1708 error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
1709 error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
1711 = I915_READ(RING_SYNC_0(ring->mmio_base));
1713 = I915_READ(RING_SYNC_1(ring->mmio_base));
1719 error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
1720 error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base));
1721 error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base));
1722 error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base));
1723 error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base));
1727 error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);
1728 error->ipeir[ring->id] = I915_READ(IPEIR);
1729 error->ipehr[ring->id] = I915_READ(IPEHR);
1730 error->instdone[ring->id] = I915_READ(INSTDONE);
1734 error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base));
1845 error->eir = I915_READ(EIR);
1846 error->pgtbl_er = I915_READ(PGTBL_ER);
1848 error->ccid = I915_READ(CCID);
1851 error->ier = I915_READ(DEIER) | I915_READ(GTIER);
1853 error->ier = I915_READ(GTIER) | I915_READ(VLV_IER);
1857 error->ier = I915_READ(IER);
1860 error->derrmr = I915_READ(DERRMR);
1863 error->forcewake = I915_READ(FORCEWAKE_VLV);
1865 error->forcewake = I915_READ(FORCEWAKE_MT);
1867 error->forcewake = I915_READ(FORCEWAKE);
1871 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
1874 error->error = I915_READ(ERROR_GEN6);
1875 error->done_reg = I915_READ(DONE_REG);
1879 error->err_int = I915_READ(GEN7_ERR_INT);
1959 u32 eir = I915_READ(EIR);
1971 u32 ipeir = I915_READ(IPEIR_I965);
1974 I915_READ(IPEIR_I965));
1976 I915_READ(IPEHR_I965));
1978 I915_READ(INSTDONE_I965));
1980 I915_READ(INSTPS));
1982 I915_READ(INSTDONE1));
1984 I915_READ(ACTHD_I965));
1989 u32 pgtbl_err = I915_READ(PGTBL_ER);
2000 u32 pgtbl_err = I915_READ(PGTBL_ER);
2013 pipe_name(pipe), I915_READ(PIPESTAT(pipe)));
2019 I915_READ(INSTPM));
2021 u32 ipeir = I915_READ(IPEIR);
2024 I915_READ(IPEIR));
2026 I915_READ(IPEHR));
2028 I915_READ(INSTDONE));
2030 I915_READ(ACTHD));
2034 u32 ipeir = I915_READ(IPEIR_I965);
2037 I915_READ(IPEIR_I965));
2039 I915_READ(IPEHR_I965));
2041 I915_READ(INSTDONE_I965));
2043 I915_READ(INSTPS));
2045 I915_READ(INSTDONE1));
2047 I915_READ(ACTHD_I965));
2055 eir = I915_READ(EIR);
2062 I915_WRITE(EMR, I915_READ(EMR) | eir);
2129 stall_detected = I915_HI_DISPBASE(I915_READ(dspsurf)) ==
2133 stall_detected = I915_READ(dspaddr) == (obj->gtt_offset +
2215 imr = I915_READ(VLV_IMR);
2277 imr = I915_READ(VLV_IMR);
2309 ipehr = I915_READ(RING_IPEHR(ring->mmio_base));
2606 I915_WRITE(GTIIR, I915_READ(GTIIR));
2607 I915_WRITE(GTIIR, I915_READ(GTIIR));
2615 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
2629 u32 mask = ~I915_READ(SDEIMR);
2652 hotplug = I915_READ(PCH_PORT_HOTPLUG);
2674 I915_WRITE(SERR_INT, I915_READ(SERR_INT));
2677 I915_WRITE(SDEIIR, I915_READ(SDEIIR));
2696 I915_WRITE(DEIIR, I915_READ(DEIIR));
2704 I915_WRITE(GTIIR, I915_READ(GTIIR));
2752 I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
2753 I915_WRITE(DEIIR, I915_READ(DEIIR));
2765 I915_WRITE(GTIIR, I915_READ(GTIIR));
2773 I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
2784 (I915_READ(GEN6_PMIMR) | ~GEN6_PM_RPS_EVENTS) & ~pm_irqs);
2786 (I915_READ(GEN6_PMIER) & GEN6_PM_RPS_EVENTS) | pm_irqs);
2832 I915_WRITE(GTIIR, I915_READ(GTIIR));
2866 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
2888 I915_WRITE(DEIIR, I915_READ(DEIIR));
2890 I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
2894 I915_WRITE(GTIIR, I915_READ(GTIIR));
2901 I915_WRITE(SDEIIR, I915_READ(SDEIIR));
2903 I915_WRITE(SERR_INT, I915_READ(SERR_INT));
3009 pipe_stats[pipe] = I915_READ(reg);
3053 I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
3069 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
3145 if (I915_READ(ISR) & flip_pending)
3167 iir = I915_READ(IIR);
3182 pipe_stats[pipe] = I915_READ(reg);
3201 u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
3214 new_iir = I915_READ(IIR); /* Flush posted writes */
3264 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
3271 I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
3276 I915_WRITE(IIR, I915_READ(IIR));
3287 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
3361 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
3398 iir = I915_READ(IIR);
3415 pipe_stats[pipe] = I915_READ(reg);
3437 u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
3449 I915_READ(PORT_HOTPLUG_STAT);
3453 new_iir = I915_READ(IIR); /* Flush posted writes */
3503 I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
3513 I915_READ(PIPESTAT(pipe)) & 0x8000ffff);
3514 I915_WRITE(IIR, I915_READ(IIR));