Lines Matching refs:ret
114 int ret;
116 ret = i915_gem_wait_for_error(&dev_priv->gpu_error);
117 if (ret)
118 return ret;
198 int ret;
210 ret = drm_gem_handle_create(file, &obj->base, &handle);
211 if (ret) {
215 return ret;
264 int ret;
268 ret = DRM_COPY_TO_USER(cpu_page + cpu_offset,
271 ret = DRM_COPY_FROM_USER(gpu_page + gpu_offset,
273 if (ret)
274 DRM_ERROR("slow_shmem_bit17_copy unswizzled path failed, ret = %d", ret);
287 ret = DRM_COPY_TO_USER(cpu_page + cpu_offset,
291 ret = DRM_COPY_FROM_USER(gpu_page + swizzled_gpu_offset,
299 if (ret)
300 DRM_ERROR("slow_shmem_bit17_copy failed, ret = %d", ret);
316 int ret = 0;
334 ret = i915_gem_object_set_to_gtt_domain(obj, false);
335 if (ret)
336 return ret;
340 ret = i915_gem_object_get_pages(obj);
341 if (ret)
342 return ret;
386 ret = DRM_COPY_TO_USER((caddr_t)user_data,
389 if (ret)
390 DRM_ERROR("shmem_pread_copy failed, ret = %d", ret);
393 return ret;
407 int ret = 0;
412 ret = i915_mutex_lock_interruptible(dev);
413 if (ret)
414 return ret;
418 ret = -ENOENT;
425 ret = -EINVAL;
432 ret = i915_gem_shmem_pread(dev, obj, args, file);
440 return ret;
451 int ret = 0;
452 ret = i915_gem_object_pin(obj, 0, true, true);
453 if (ret)
456 ret = i915_gem_object_set_to_gtt_domain(obj, true);
457 if (ret)
460 ret = i915_gem_object_put_fence(obj);
461 if (ret)
465 ret = DRM_COPY_FROM_USER(obj->base.kaddr + args->offset, user_data, args->size);
466 if (ret) {
467 DRM_ERROR("copy_from_user failed, ret = %d", ret);
468 return ret;
474 return ret;
489 int ret = 0;
514 ret = i915_gem_object_set_to_gtt_domain(obj, true);
515 if (ret)
516 return ret;
525 ret = i915_gem_object_get_pages(obj);
526 if (ret)
527 return ret;
570 ret = DRM_COPY_FROM_USER(obj->base.kaddr + args->offset,
573 if (ret)
574 DRM_ERROR("shmem_pwrite_copy failed, ret = %d", ret);
581 return ret;
595 int ret;
600 ret = i915_mutex_lock_interruptible(dev);
601 if (ret)
602 return ret;
606 ret = -ENOENT;
613 ret = -EINVAL;
621 ret = -EFAULT;
629 ret = i915_gem_phys_pwrite(dev, obj, args, file);
636 ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file);
646 if (ret == -EFAULT || ret == -ENOSPC)
647 ret = i915_gem_shmem_pwrite(dev, obj, args, file);
653 return ret;
683 int ret;
687 ret = 0;
689 ret = i915_add_request(ring, NULL);
691 return ret;
719 int ret = 0, end = 0;
739 ret = -EBUSY;
757 ret = -EBUSY;
761 DRM_WAIT(ret, &ring->irq_queue, EXIT_COND);
767 ret = -EAGAIN;
773 ret = end;
779 if (ret) {
786 __func__, ret, seqno, ring->get_seqno(ring, true),
790 return (ret);
803 int ret;
808 ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible);
809 if (ret)
810 return ret;
812 ret = i915_gem_check_olr(ring, seqno);
813 if (ret)
814 return ret;
850 int ret;
856 ret = i915_wait_seqno(ring, seqno);
857 if (ret)
858 return ret;
875 int ret;
884 ret = i915_gem_check_wedge(&dev_priv->gpu_error, true);
885 if (ret)
886 return ret;
888 ret = i915_gem_check_olr(ring, seqno);
889 if (ret)
890 return ret;
894 ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
896 if (ret)
897 return ret;
914 int ret;
929 ret = i915_mutex_lock_interruptible(dev);
930 if (ret)
931 return ret;
935 ret = -ENOENT;
943 ret = i915_gem_object_wait_rendering__nonblocking(obj, !write_domain);
944 if (ret)
948 ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0);
954 if (ret == -EINVAL)
955 ret = 0;
957 ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0);
964 return ret;
976 int ret = 0;
978 ret = i915_mutex_lock_interruptible(dev);
979 if (ret)
980 return ret;
984 ret = -ENOENT;
995 return ret;
1013 int ret;
1031 ret = ddi_devmap_segmap(dev_id, (off_t)obj->maplist.user_token,
1034 if (ret)
1035 return ret;
1052 int ret = 0;
1064 ret = -EINVAL;
1068 ret = i915_gem_object_pin(obj_priv, 0, true, false);
1069 if (ret)
1072 ret = i915_gem_object_set_to_gtt_domain(obj_priv, 1);
1073 if (ret)
1076 ret = i915_gem_object_get_fence(obj_priv);
1077 if (ret)
1110 int ret;
1113 ret = drm_gem_create_mmap_offset(&obj->base);
1114 if (ret) {
1116 return ret;
1229 int ret;
1231 ret = i915_mutex_lock_interruptible(dev);
1232 if (ret)
1233 return ret;
1237 ret = -ENOENT;
1242 ret = -E2BIG;
1247 ret = i915_gem_create_mmap_offset(obj);
1248 if (ret)
1258 return ret;
1288 int ret;
1289 ret = i915_gem_object_set_to_cpu_domain(obj, true);
1290 if (ret) {
1294 WARN_ON(ret != -EIO);
1363 int ret;
1370 ret = ops->get_pages(obj);
1371 if (ret)
1372 return ret;
1451 int ret, i, j;
1455 ret = intel_ring_idle(ring);
1456 if (ret)
1457 return ret;
1475 int ret;
1483 ret = i915_gem_init_seqno(dev, seqno - 1);
1484 if (ret)
1485 return ret;
1505 int ret = i915_gem_init_seqno(dev, 0);
1506 if (ret)
1507 return ret;
1525 int ret;
1535 ret = intel_ring_flush_all_caches(ring);
1536 if (ret)
1537 return ret;
1551 ret = ring->add_request(ring);
1552 if (ret) {
1554 return ret;
1929 int ret;
1932 ret = i915_gem_check_olr(obj->ring, obj->last_read_seqno);
1933 if (ret)
1934 return ret;
1974 int ret = 0;
1980 ret = i915_mutex_lock_interruptible(dev);
1981 if (ret)
1982 return ret;
1991 ret = i915_gem_object_flush_active(obj);
1992 if (ret)
2007 ret = -ETIME;
2015 ret = __wait_seqno(ring, seqno, reset_counter, true, timeout);
2019 return ret;
2024 return ret;
2045 int ret, idx;
2059 ret = i915_gem_check_olr(obj->ring, seqno);
2060 if (ret)
2061 return ret;
2063 ret = to->sync_to(to, from, seqno);
2064 if (!ret)
2071 return ret;
2095 int ret;
2105 ret = i915_gem_object_finish_gpu(obj);
2106 if (ret)
2107 return ret;
2116 ret = i915_gem_object_put_fence(obj);
2117 if (ret)
2118 return ret;
2146 int ret, i;
2150 ret = i915_switch_context(ring, NULL, DEFAULT_CONTEXT_ID);
2151 if (ret)
2152 return ret;
2154 ret = intel_ring_idle(ring);
2155 if (ret)
2156 return ret;
2358 int ret = i915_wait_seqno(obj->ring, obj->last_fenced_seqno);
2359 if (ret)
2360 return ret;
2374 int ret;
2376 ret = i915_gem_object_wait_fence(obj);
2377 if (ret)
2378 return ret;
2444 int ret;
2450 ret = i915_gem_object_wait_fence(obj);
2451 if (ret)
2452 return ret;
2471 ret = i915_gem_object_wait_fence(old);
2472 if (ret)
2473 return ret;
2571 int ret;
2605 ret = i915_gem_object_get_pages(obj);
2606 if (ret)
2607 return ret;
2618 ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space, node,
2621 if (ret) {
2622 ret = i915_gem_evict_something(dev, size, alignment,
2626 if (ret == 0)
2631 return ret;
2641 ret = i915_gem_gtt_prepare_object(obj);
2642 if (ret) {
2645 return ret;
2744 int ret;
2753 ret = i915_gem_object_wait_rendering(obj, !write);
2754 if (ret)
2755 return ret;
2790 int ret;
2801 ret = i915_gem_object_unbind(obj, true);
2802 if (ret)
2803 return ret;
2807 ret = i915_gem_object_finish_gpu(obj);
2808 if (ret)
2809 return ret;
2818 ret = i915_gem_object_put_fence(obj);
2819 if (ret)
2820 return ret;
2855 int ret;
2857 ret = i915_mutex_lock_interruptible(dev);
2858 if (ret)
2859 return ret;
2863 ret = -ENOENT;
2872 return ret;
2880 int ret;
2893 ret = i915_mutex_lock_interruptible(dev);
2894 if (ret)
2895 return ret;
2899 ret = -ENOENT;
2903 ret = i915_gem_object_set_cache_level(obj, level);
2908 return ret;
2923 int ret;
2926 ret = i915_gem_object_sync(obj, pipelined);
2927 if (ret)
2928 return ret;
2940 ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
2941 if (ret)
2942 return ret;
2948 ret = i915_gem_object_pin(obj, alignment, true, false);
2949 if (ret)
2950 return ret;
2969 int ret;
2974 ret = i915_gem_object_wait_rendering(obj, false);
2975 if (ret)
2976 return ret;
2994 int ret;
2999 ret = i915_gem_object_wait_rendering(obj, !write);
3000 if (ret)
3001 return ret;
3051 int ret;
3053 ret = i915_gem_wait_for_error(&dev_priv->gpu_error);
3054 if (ret)
3055 return ret;
3057 ret = i915_gem_check_wedge(&dev_priv->gpu_error, false);
3058 if (ret)
3059 return ret;
3074 ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
3075 if (ret == 0)
3078 return ret;
3087 int ret;
3101 ret = i915_gem_object_unbind(obj, 1);
3102 if (ret)
3103 return ret;
3110 ret = i915_gem_object_bind_to_gtt(obj, alignment,
3113 if (ret)
3114 return ret;
3145 int ret;
3147 ret = i915_mutex_lock_interruptible(dev);
3148 if (ret)
3149 return ret;
3153 ret = -ENOENT;
3160 ret = -EINVAL;
3167 ret = i915_gem_object_pin(obj, args->alignment, true, false);
3168 if (ret)
3181 return ret;
3190 int ret;
3192 ret = i915_mutex_lock_interruptible(dev);
3193 if (ret)
3194 return ret;
3198 ret = -ENOENT;
3205 ret = -EINVAL;
3218 return ret;
3227 int ret;
3229 ret = i915_mutex_lock_interruptible(dev);
3230 if (ret)
3231 return ret;
3235 ret = -ENOENT;
3244 ret = i915_gem_object_flush_active(obj);
3254 return ret;
3356 int ret;
3362 ret = i915_gem_object_unbind(obj, 1);
3363 if (ret) {
3399 int ret;
3408 ret = i915_gpu_idle(dev);
3409 if (ret) {
3411 return ret;
3507 int ret;
3509 ret = intel_init_render_ring_buffer(dev);
3510 if (ret)
3511 return ret;
3514 ret = intel_init_bsd_ring_buffer(dev);
3515 if (ret)
3520 ret = intel_init_blt_ring_buffer(dev);
3521 if (ret)
3526 ret = intel_init_vebox_ring_buffer(dev);
3527 if (ret)
3532 ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000));
3533 if (ret)
3547 return ret;
3554 int ret;
3569 ret = i915_gem_init_rings(dev);
3570 if (ret)
3571 return ret;
3579 ret = dev_priv->mm.aliasing_ppgtt->enable(dev);
3580 if (ret) {
3592 int ret;
3634 ret = intel_pin_and_fence_fb_obj(dev, dev_priv->fbcon_obj, false);
3635 if (ret) {
3636 DRM_ERROR("failed to pin fb ret %d", ret);
3640 return ret;
3646 ret = i915_gem_init_hw(dev);
3648 if (ret) {
3650 return ret;
3675 int ret;
3688 ret = i915_gem_init_hw(dev);
3689 if (ret != 0) {
3691 return ret;
3697 ret = drm_irq_install(dev);
3698 if (ret)
3709 return ret;
3726 int ret;
3731 ret = i915_gem_idle(dev, 1);
3732 if (ret)
3733 DRM_ERROR("failed to idle hardware: %d\n", ret);
3800 int ret;
3813 ret = -ENOMEM;
3822 return ret;
3854 int i, ret;
3861 ret = i915_gem_object_get_pages_gtt(obj);
3862 if (ret)
3890 int ret = 0;
3905 ret = i915_gem_init_phys_object(dev, id,
3907 if (ret) {
3918 ret = i915_gem_object_get_pages_gtt(obj);
3919 if (ret) {
3938 return ret;
3949 int ret;
3956 ret = DRM_COPY_FROM_USER(obj_addr, user_data, args->size);
3957 if (ret)