Lines Matching refs:drm_i915_private
133 struct drm_i915_private;
157 void (*enable)(struct drm_i915_private *dev_priv,
159 void (*disable)(struct drm_i915_private *dev_priv,
161 bool (*get_hw_state)(struct drm_i915_private *dev_priv,
400 void (*force_wake_get)(struct drm_i915_private *dev_priv);
401 void (*force_wake_put)(struct drm_i915_private *dev_priv);
573 struct drm_i915_private *dev_priv;
1010 typedef struct drm_i915_private {
1429 #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
1523 #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
1720 struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
1731 struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
1911 struct drm_i915_private *dev_priv, unsigned port);
1937 extern int valleyview_rps_max_freq(struct drm_i915_private *dev_priv);
1938 extern int valleyview_rps_min_freq(struct drm_i915_private *dev_priv);
1962 void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
1963 void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
1964 int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);
1966 int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val);
1967 int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
1970 u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr);
1971 void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
1972 u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
1973 u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg);
1974 void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
1975 u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
1977 void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
1984 u ## x i915_read ## x(struct drm_i915_private *dev_priv, u32 reg);
1993 void i915_write ## x(struct drm_i915_private *dev_priv, u32 reg, \