Lines Matching defs:INTEL_INFO
127 #define for_each_pipe(p) for ((p) = 0; (p) < INTEL_INFO(dev)->num_pipes; (p)++)
1429 #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
1433 #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x)
1435 #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)
1438 #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
1439 #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)
1440 #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline)
1442 #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
1445 #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)
1446 #define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
1449 #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge)
1456 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
1457 #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell)
1458 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
1468 #define IS_GEN2(dev) (INTEL_INFO(dev)->gen == 2)
1469 #define IS_GEN3(dev) (INTEL_INFO(dev)->gen == 3)
1470 #define IS_GEN4(dev) (INTEL_INFO(dev)->gen == 4)
1471 #define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5)
1472 #define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6)
1473 #define IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7)
1475 #define HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)
1476 #define HAS_BLT(dev) (INTEL_INFO(dev)->has_blt_ring)
1477 #define HAS_VEBOX(dev) (INTEL_INFO(dev)->has_vebox_ring)
1478 #define HAS_LLC(dev) (INTEL_INFO(dev)->has_llc)
1479 #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
1481 #define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6)
1482 #define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev))
1484 #define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
1485 #define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)
1499 #define SUPPORTS_TV(dev) (INTEL_INFO(dev)->supports_tv)
1500 #define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)
1504 #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
1505 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
1506 #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
1510 #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
1512 #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
1514 #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
1530 #define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)