Lines Matching defs:efb_priv
43 #define DFB32ADR(efb_priv, row, col) \
44 ((((uint32_t *)efb_priv->consinfo.dfb + \
45 efb_priv->consinfo.offset)) + \
46 ((row) * efb_priv->consinfo.pitch + (col)))
48 #define DFB8ADR(efb_priv, row, col) \
49 (((uint8_t *)efb_priv->consinfo.dfb) + \
50 efb_priv->consinfo.offset + \
51 ((row) * efb_priv->consinfo.pitch + (col)))
60 efb_private_t *efb_priv;
69 efb_priv = (efb_private_t *)(dev_priv->private_data);
70 registers = efb_priv->registers;
72 if (efb_priv->consinfo.stream == 0)
77 efb_priv->consinfo.offset = offset;
80 (caddr_t *)&efb_priv->consinfo.dfb,
82 (ddi_acc_handle_t *)&efb_priv->consinfo.dfb_handle)) {
98 efb_private_t *efb_priv;
105 efb_priv = (efb_private_t *)(dev_priv->private_data);
106 registers = efb_priv->registers;
123 if (efb_priv->consinfo.bufp == NULL) {
124 efb_priv->consinfo.bufsize = DEFCHAR_SIZE * EFB_MAX_PIXBYTES;
125 efb_priv->consinfo.bufp =
126 kmem_zalloc(efb_priv->consinfo.bufsize, KM_SLEEP);
129 if (efb_priv->consinfo.polledio == NULL) {
130 efb_priv->consinfo.polledio =
133 efb_priv->consinfo.polledio->arg =
134 (struct vis_polledio_arg *)efb_priv;
137 if (efb_priv->consinfo.csrp == NULL)
138 efb_priv->consinfo.csrp =
144 switch (efb_priv->primary_stream) {
147 efb_priv->consinfo.stream = 0;
150 efb_priv->consinfo.stream = 1;
160 efb_priv->consinfo.te_modechg_cb = devinit.modechg_cb;
161 efb_priv->consinfo.te_ctx = devinit.modechg_arg;
163 efb_getsize(efb_priv);
170 devinit.width = efb_priv->w[efb_priv->consinfo.stream];
171 devinit.height = efb_priv->h[efb_priv->consinfo.stream];
173 efb_priv->depth[efb_priv->consinfo.stream] / 8;
174 devinit.depth = efb_priv->depth[efb_priv->consinfo.stream];
177 devinit.polledio = efb_priv->consinfo.polledio;
185 efb_priv->consinfo.polledio->display = efb_polled_consdisplay;
186 efb_priv->consinfo.polledio->copy = efb_polled_conscopy;
187 efb_priv->consinfo.polledio->cursor = efb_polled_conscursor;
208 if (efb_priv->consinfo.stream == 0)
209 efb_priv->consinfo.pitch = regr(CRTC_PITCH) * 8;
211 efb_priv->consinfo.pitch = regr(CRTC2_PITCH) * 8;
217 efb_priv->cmap_flags[0][i] = 0;
218 efb_priv->cmap_flags[1][i] = 0;
228 efb_setup_cmap32(efb_priv);
261 efb_private_t *efb_priv;
264 efb_priv = (efb_private_t *)(dev_priv->private_data);
266 registers = efb_priv->registers;
270 efb_getsize(efb_priv);
275 if (efb_priv->consinfo.stream == 0) {
276 efb_priv->consinfo.pitch =
279 efb_priv->consinfo.offset = regr(CRTC_OFFSET);
282 efb_priv->consinfo.pitch =
285 efb_priv->consinfo.offset = regr(CRTC2_OFFSET);
288 if (efb_priv->consinfo.pitch == 0) {
289 efb_priv->consinfo.stream =
290 (~efb_priv->consinfo.stream) & 0x1;
297 switch (efb_priv->depth[efb_priv->consinfo.stream]) {
299 efb_priv->consinfo.bgcolor = 0;
302 efb_setup_cmap32(efb_priv);
303 efb_priv->consinfo.bgcolor = 0xffffffff;
307 efb_priv->setting_videomode = 0;
315 efb_priv->consinfo.rshift = 16;
316 efb_priv->consinfo.gshift = 8;
317 efb_priv->consinfo.bshift = 0;
322 efb_priv->consinfo.rshift = 8;
323 efb_priv->consinfo.gshift = 16;
324 efb_priv->consinfo.bshift = 24;
329 if (efb_priv->consinfo.te_modechg_cb != NULL) {
335 devinit.polledio = efb_priv->consinfo.polledio;
336 devinit.width = efb_priv->w[efb_priv->consinfo.stream];
337 devinit.height = efb_priv->h[efb_priv->consinfo.stream];
338 devinit.depth = efb_priv->depth[efb_priv->consinfo.stream];
340 efb_priv->depth[efb_priv->consinfo.stream] / 8;
344 efb_priv->consinfo.te_modechg_cb(efb_priv->consinfo.te_ctx,
356 efb_private_t *efb_priv;
362 efb_priv = (efb_private_t *)(dev_priv->private_data);
366 efb_priv->consinfo.polledio->display = NULL;
367 efb_priv->consinfo.polledio->copy = NULL;
368 efb_priv->consinfo.polledio->cursor = NULL;
370 efb_priv->consinfo.te_modechg_cb = NULL;
371 efb_priv->consinfo.te_ctx = NULL;
373 if (efb_priv->consinfo.polledio != NULL) {
374 kmem_free(efb_priv->consinfo.polledio,
377 efb_priv->consinfo.polledio = NULL;
380 if (efb_priv->consinfo.bufp != NULL) {
381 kmem_free(efb_priv->consinfo.bufp,
382 efb_priv->consinfo.bufsize);
384 efb_priv->consinfo.bufsize = 0;
385 efb_priv->consinfo.bufp = NULL;
388 if (efb_priv->consinfo.csrp != NULL) {
389 kmem_free(efb_priv->consinfo.csrp,
391 efb_priv->consinfo.csrp = NULL;
394 efb_priv->consinfo.kcmap_max = 0;
419 efb_setup_cmap32(efb_private_t *efb_priv)
421 int stream = efb_priv->consinfo.stream;
425 efb_priv->colormap[stream][0][i] =
426 efb_priv->colormap[stream][1][i] =
427 efb_priv->colormap[stream][2][i] = (i << 2) | (i >> 6);
428 efb_priv->cmap_flags[stream][i] = 1;
430 efb_cmap_write(efb_priv, stream);
442 efb_private_t *efb_priv;
452 efb_priv = (efb_private_t *)(dev_priv->private_data);
454 stream = efb_priv->consinfo.stream;
458 efb_priv->consinfo.kcmap[stream][0][cmap->index + i] =
461 efb_priv->consinfo.kcmap[stream][1][cmap->index + i] =
464 efb_priv->consinfo.kcmap[stream][2][cmap->index + i] =
475 efb_restore_kcmap(efb_private_t *efb_priv)
480 stream = efb_priv->consinfo.stream;
483 switch (efb_priv->depth[stream]) {
485 for (i = 0; i <= efb_priv->consinfo.kcmap_max; i++) {
487 if (efb_priv->consinfo.kcmap_flags[stream][i]) {
489 efb_priv->colormap[save][0][i] =
490 efb_priv->colormap[stream][0][i];
492 efb_priv->colormap[save][1][i] =
493 efb_priv->colormap[stream][1][i];
495 efb_priv->colormap[save][2][i] =
496 efb_priv->colormap[stream][2][i];
499 efb_priv->colormap[stream][0][i] =
500 efb_priv->consinfo.kcmap[stream][0][i];
502 efb_priv->colormap[stream][1][i] =
503 efb_priv->consinfo.kcmap[stream][1][i];
505 efb_priv->colormap[stream][2][i] =
506 efb_priv->consinfo.kcmap[stream][2][i];
508 efb_priv->cmap_flags[stream][i] = 1;
512 efb_cmap_write(efb_priv, stream);
524 if (efb_priv->colormap[stream][0][0] != 0 ||
525 efb_priv->colormap[stream][0][255] != 0x3ff)
526 efb_setup_cmap32(efb_priv);
561 efb_private_t *efb_priv;
564 efb_priv = (efb_private_t *)(dev_priv->private_data);
574 if (image_size > efb_priv->consinfo.bufsize) {
575 void *tmp = efb_priv->consinfo.bufp;
576 if (!(efb_priv->consinfo.bufp =
578 efb_priv->consinfo.bufp = tmp;
582 kmem_free(tmp, efb_priv->consinfo.bufsize);
584 efb_priv->consinfo.bufsize = image_size;
587 if (ddi_copyin(efb_cd.data, efb_priv->consinfo.bufp,
591 if (efb_chk_disp_params(efb_priv, &efb_cd) != DDI_SUCCESS) {
598 if (efb_priv->setting_videomode) {
607 efb_draw.image = efb_priv->consinfo.bufp;
609 if (efb_invalidate_userctx(efb_priv) == DDI_SUCCESS) {
610 efb_restore_kcmap(efb_priv);
611 efb_termemu_display(efb_priv, &efb_draw);
626 efb_private_t *efb_priv;
629 efb_priv = (efb_private_t *)(dev_priv->private_data);
638 if (efb_chk_copy_params(efb_priv, &efb_cpydata) != DDI_SUCCESS) {
645 if (efb_priv->setting_videomode) {
650 if (efb_invalidate_userctx(efb_priv) == DDI_SUCCESS)
651 efb_termemu_copy(efb_priv, &efb_cpydata);
665 efb_private_t *efb_priv;
668 efb_priv = (efb_private_t *)(dev_priv->private_data);
677 if (efb_chk_cursor_params(efb_priv, &efb_cc) != DDI_SUCCESS) {
684 if (efb_priv->setting_videomode) {
689 if (efb_invalidate_userctx(efb_priv) == DDI_SUCCESS)
690 efb_termemu_cursor(efb_priv, &efb_cc);
727 efb_private_t *efb_priv = (efb_private_t *)arg;
737 efb_polled_check_power(efb_priv);
738 efb_restore_kcmap(efb_priv);
739 efb_termemu_display(efb_priv, &efb_draw);
751 efb_private_t *efb_priv = (efb_private_t *)arg;
754 efb_polled_check_power(efb_priv);
755 efb_restore_kcmap(efb_priv);
756 efb_termemu_copy(efb_priv, efb_cpydata);
770 efb_private_t *efb_priv = (efb_private_t *)arg;
773 efb_polled_check_power(efb_priv);
774 efb_restore_kcmap(efb_priv);
775 efb_termemu_cursor(efb_priv, efb_cc);
789 efb_termemu_display(efb_private_t *efb_priv, struct efb_vis_draw_data *efb_draw)
794 int stream = efb_priv->consinfo.stream;
805 rshift = efb_priv->consinfo.rshift;
806 gshift = efb_priv->consinfo.gshift;
807 bshift = efb_priv->consinfo.bshift;
813 switch (efb_priv->depth[stream]) {
825 pixp = DFB32ADR(efb_priv, r + y, c + x);
830 pixp = DFB8ADR(efb_priv, r + y, c + x);
833 if (b > efb_priv->consinfo.kcmap_max)
834 efb_priv->consinfo.kcmap_max = b;
837 efb_priv->consinfo.kcmap_flags[stream][b] = 1;
874 efb_termemu_cursor_32(efb_private_t *efb_priv, struct vis_conscursor *efb_cc)
883 uint32_t *csrp = (uint32_t *)efb_priv->consinfo.csrp;
884 uint32_t rshift = efb_priv->consinfo.rshift;
885 uint32_t gshift = efb_priv->consinfo.gshift;
886 uint32_t bshift = efb_priv->consinfo.bshift;
889 ASSERT(efb_priv->depth[efb_priv->consinfo.stream] == 32);
905 pixp = DFB32ADR(efb_priv, r + y, c + x);
913 pixp = DFB32ADR(efb_priv, r + y, c + x);
921 efb_termemu_cursor_8(efb_private_t *efb_priv, struct vis_conscursor *efb_cc)
929 uint8_t *csrp = (uint8_t *)efb_priv->consinfo.csrp;
934 ASSERT(efb_priv->depth[efb_priv->consinfo.stream] == 8);
939 pixp = DFB8ADR(efb_priv, r + y, c + x);
947 pixp = DFB8ADR(efb_priv, r + y, c + x);
955 efb_termemu_cursor(efb_private_t *efb_priv, struct vis_conscursor *efb_cc)
957 switch (efb_priv->depth[efb_priv->consinfo.stream]) {
959 efb_termemu_cursor_32(efb_priv, efb_cc);
962 efb_termemu_cursor_8(efb_priv, efb_cc);
978 efb_termemu_copy(efb_private_t *efb_priv, struct vis_conscopy *efb_copydata)
980 volatile caddr_t registers = efb_priv->registers;
991 int stream = efb_priv->consinfo.stream;
1006 depth = efb_priv->depth[stream];
1007 pitch = efb_priv->consinfo.pitch * depth / 8 / 64;
1008 offset = efb_priv->consinfo.offset / 1024;
1026 (void) efb_wait_idle(efb_priv, "termemu_copy", __LINE__);
1051 (void) efb_wait_idle(efb_priv, "termemu_copy", __LINE__);
1062 (void) efb_wait_fifo(efb_priv, 3, "termemu_copy", __LINE__);
1066 (void) efb_wait_fifo(efb_priv, 3, "termemu_copy", __LINE__);
1070 (void) efb_wait_idle(efb_priv, "termemu_copy", __LINE__);
1090 efb_invalidate_userctx(efb_private_t *efb_priv)
1092 if (efb_priv->cur_ctx != NULL) {
1096 efb_ctx_wait(efb_priv);
1097 return (efb_ctx_make_current(efb_priv, NULL));
1117 efb_chk_disp_params(efb_private_t *efb_priv, struct vis_consdisplay *disp)
1119 if ((disp->row > efb_priv->h[efb_priv->consinfo.stream]) ||
1120 (disp->col > efb_priv->w[efb_priv->consinfo.stream]))
1124 efb_priv->h[efb_priv->consinfo.stream]) {
1126 efb_priv->h[efb_priv->consinfo.stream];
1134 efb_priv->w[efb_priv->consinfo.stream]) {
1136 efb_priv->w[efb_priv->consinfo.stream];
1154 efb_chk_cursor_params(efb_private_t *efb_priv, struct vis_conscursor *disp)
1156 if ((disp->row > efb_priv->h[efb_priv->consinfo.stream]) ||
1157 (disp->col > efb_priv->w[efb_priv->consinfo.stream]))
1161 efb_priv->h[efb_priv->consinfo.stream])
1165 efb_priv->w[efb_priv->consinfo.stream])
1175 efb_chk_copy_params(efb_private_t *efb_priv, struct vis_conscopy *disp)
1178 int s = efb_priv->consinfo.stream;
1180 if ((0 > disp->e_col) || (disp->e_col > efb_priv->w[s]) ||
1181 (0 > disp->s_col) || (disp->s_col > efb_priv->w[s]) ||
1182 (0 > disp->t_col) || (disp->t_col > efb_priv->w[s]))
1188 if ((0 > width) || (width > efb_priv->w[s]) ||
1189 (0 > height) || (height > efb_priv->h[s]))
1192 if ((disp->t_row + height) > efb_priv->h[s])
1204 efb_polled_check_power(efb_private_t *efb_priv)
1207 if (efb_priv->power_level[EFB_PM_BOARD] < EFB_PWR_ON) {
1208 efb_set_board_power(efb_priv, EFB_PWR_ON);
1211 if (efb_priv->consinfo.stream == 0) {
1212 if (efb_priv->power_level[EFB_PM_MONITOR] < EFB_PWR_ON)
1213 efb_set_monitor_power1(efb_priv, EFB_PWR_ON);
1215 if (efb_priv->power_level[EFB_PM_MONITOR2] < EFB_PWR_ON)
1216 efb_set_monitor_power2(efb_priv, EFB_PWR_ON);
1219 _NOTE(ARGUNUSED(efb_priv))