Cross Reference: /solaris-x11-s11/open-src/kernel/efb/src/efb

Lines Matching defs:efb_priv
45 static int	efb_fifo_reset(efb_private_t *efb_priv);
70 	efb_private_t *efb_priv;
82 	efb_priv = (efb_private_t *)dev_priv->private_data;
83 	efb_priv->dip = statep->dip;
85 	if (pci_config_setup(statep->dip, &efb_priv->pci_handle)
100 	efb_priv->primary_stream = 0;
101 	efb_priv->power_level[EFB_PM_BOARD] = EFB_PWR_ON;
122 	efb_private_t *efb_priv;
125 	efb_priv = (efb_private_t *)dev_priv->private_data;
127 	if (efb_priv != NULL) {
139 	efb_private_t *efb_priv;
147 	efb_priv = (efb_private_t *)dev_priv->private_data;
152 		*pBuf = pci_config_get8(efb_priv->pci_handle, offset);
155 		*pshort = pci_config_get16(efb_priv->pci_handle, offset);
158 		*pint = pci_config_get32(efb_priv->pci_handle, offset);
161 		*plong = pci_config_get64(efb_priv->pci_handle, offset);
174 				    pci_config_get8(efb_priv->pci_handle, i++);
176 				    pci_config_get8(efb_priv->pci_handle, i++);
194 				    pci_config_get8(efb_priv->pci_handle, i++);
201 				    pci_config_get8(efb_priv->pci_handle, i++);
208 				    pci_config_get8(efb_priv->pci_handle, i++);
210 				    pci_config_get8(efb_priv->pci_handle, i++);
212 				    pci_config_get8(efb_priv->pci_handle, i++);
214 				    pci_config_get8(efb_priv->pci_handle, i++);
245 	efb_private_t *efb_priv;
248 	efb_priv = (efb_private_t *)dev_priv->private_data;
250 	if (ddi_regs_map_setup(statep->dip, 3, (caddr_t *)&efb_priv->registers,
251 	    0L, EFB_REG_SIZE, &littleEnd, &efb_priv->registersmap)
262 	efb_private_t *efb_priv;
265 	efb_priv = (efb_private_t *)dev_priv->private_data;
267 	if (efb_priv->registers != NULL) {
268 		ddi_regs_map_free(&efb_priv->registersmap);
269 		efb_priv->registers = NULL;
315 	efb_private_t *efb_priv;
318 	efb_priv = (efb_private_t *)dev_priv->private_data;
320 	if (ddi_copyin((caddr_t)arg, &efb_priv->videomode,
338 	efb_private_t *efb_priv;
341 	efb_priv = (efb_private_t *)dev_priv->private_data;
343 	if (ddi_copyout(&efb_priv->videomode, (caddr_t)arg,
358 	efb_private_t *efb_priv;
366 	efb_priv = (efb_private_t *)dev_priv->private_data;
385 	ret = efb_read_edid(efb_priv, stream, results, &length);
411 	efb_private_t *efb_priv;
419 	efb_priv = (efb_private_t *)dev_priv->private_data;
450 	ret = efb_read_edid(efb_priv, stream, results, &edid_buf.length);
626 size_compute(efb_private_t *efb_priv, int stream,
633 	efb_priv->w[stream] = (v2 + 1) * 8;
637 	efb_priv->h[stream] = v2 + 1;
645 efb_getsize(efb_private_t *efb_priv)
647 	volatile caddr_t registers = efb_priv->registers;
654 	if (efb_priv->power_level[EFB_PM_BOARD] <= EFB_PWR_OFF)
663 	efb_priv->depth[0] = depths[v2];
666 	efb_priv->stride[0] = (v & CRTC_PITCH__CRTC_PITCH_MASK) * 8;
671 	size_compute(efb_priv, 0, h_total_disp, v_total_disp);
680 	efb_priv->depth[1] = depths[v2];
683 	efb_priv->stride[1] = (v & CRTC_PITCH__CRTC_PITCH_MASK) * 8;
688 	size_compute(efb_priv, 1, h_total_disp, v_total_disp);
695 efb_cmap_write(efb_private_t *efb_priv, int cmap)
697 	volatile caddr_t registers = efb_priv->registers;
713 	if (efb_priv->power_level[EFB_PM_BOARD] <= EFB_PWR_OFF)
716 	red   = efb_priv->colormap[cmap][0];
717 	green = efb_priv->colormap[cmap][1];
718 	blue  = efb_priv->colormap[cmap][2];
719 	flags = efb_priv->cmap_flags[map];
760 efb_cmap_read(efb_private_t *efb_priv, int start, int count, int map)
762 	volatile caddr_t registers = efb_priv->registers;
766 	if (efb_priv->power_level[EFB_PM_BOARD] <= EFB_PWR_OFF)
778 		efb_priv->colormap[map][0][idx] =
782 		efb_priv->colormap[map][1][idx] =
786 		efb_priv->colormap[map][2][idx] =
805 efb_wait_fifo(efb_private_t *efb_priv, int n, const char *func, int line)
807 	volatile caddr_t registers = efb_priv->registers;
839 efb_wait_idle(efb_private_t *efb_priv, const char *func, int line)
841 	volatile caddr_t registers = efb_priv->registers;
853 	if (efb_wait_fifo(efb_priv, 64, func, line) != DDI_SUCCESS) {
856 		if (efb_fifo_reset(efb_priv) != DDI_SUCCESS) {
860 		if (efb_wait_fifo(efb_priv, 64, func, line) != DDI_SUCCESS) {
888 	if (efb_fifo_reset(efb_priv) != DDI_SUCCESS) {
897 efb_wait_host_data(efb_private_t *efb_priv, const char *func, int line)
899 	volatile caddr_t registers = efb_priv->registers;
911 	if (efb_wait_fifo(efb_priv, 64, func, line) != DDI_SUCCESS) {
914 		if (efb_fifo_reset(efb_priv) != DDI_SUCCESS) {
918 		if (efb_wait_fifo(efb_priv, 64, func, line) != DDI_SUCCESS) {
962 	if (efb_fifo_reset(efb_priv) != DDI_SUCCESS) {
972 efb_fifo_reset(efb_private_t *efb_priv)
974 	volatile caddr_t registers = efb_priv->registers;
975 	dev_info_t	*devi = efb_priv->dip;