Lines Matching refs:REGR
55 efb_info.efb_fb_size = REGR(RADEON_CONFIG_MEMSIZE);
58 efb_info.efb_fb_size = REGR(R600_CONFIG_MEMSIZE);
211 crtc_gen_cntl = REGR(CRTC_GEN_CNTL);
215 crtc_h_total_disp = REGR(CRTC_H_TOTAL_DISP);
219 crtc_v_total_disp = REGR(CRTC_V_TOTAL_DISP);
223 crtc_pitch = REGR(CRTC_PITCH);
377 offset = REGR(CRTC_OFFSET) & 0x7ffffff;
378 pitch = REGR(CRTC_PITCH) & 0x7ff;
427 REGR(RADEON_PALETTE_INDEX);
432 efb_info.efb_palet[coloron] = REGR(RADEON_PALETTE_30_DATA);
529 save_palette_index = REGR(RADEON_PALETTE_INDEX);
550 save_palette_index = REGR(RADEON_PALETTE_INDEX);
674 REGR(RADEON_RB2D_DSTCACHE_CTLSTAT) | 0xf);
678 if ((REGR(RADEON_RB2D_DSTCACHE_CTLSTAT) &
682 return ((REGR(RADEON_RB2D_DSTCACHE_CTLSTAT) &
696 save_clockcntlindex = REGR(RADEON_CLOCK_CNTL_INDEX);
699 save_genresetcntl = REGR(RADEON_DISP_MISC_CNTL);
705 REGR(RADEON_DISP_MISC_CNTL);
708 REGR(RADEON_DISP_MISC_CNTL);
726 if ((REGR(RBBM_STATUS) &
731 if ((REGR(RBBM_STATUS) & RBBM_STATUS__CMDFIFO_AVAIL_MASK) < c) {
734 if ((REGR(RBBM_STATUS) &
739 if ((REGR(RBBM_STATUS) &
743 return ((REGR(RBBM_STATUS) &
757 if (!(REGR(RBBM_STATUS) & GUI_ACTIVE))
761 if (REGR(RBBM_STATUS) & GUI_ACTIVE) {
764 if (!(REGR(RBBM_STATUS) & GUI_ACTIVE))
769 if ((REGR(RBBM_STATUS) & GUI_ACTIVE) != 0)
772 return ((REGR(RBBM_STATUS) & GUI_ACTIVE) == 0);